[llvm] [AArch64] Correct position of CFI Instruction for Pointer Authentication (PR #121559)
via llvm-commits
llvm-commits at lists.llvm.org
Fri Jan 3 03:01:49 PST 2025
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-aarch64
Author: Jack Styles (Stylie777)
<details>
<summary>Changes</summary>
As part #<!-- -->112171 support for FEAT_PAuthLR's CFI instructions were added, however the CFI instructions are emitted in the incorrect location. This leads to incorrect CodeGen being generated and possible issues when running a program. According to the ABI, the CFI instructions should be emitted before the signing instruction. This is now done properly.
ABI information can be found here: https://github.com/ARM-software/abi-aa/blob/bf0e2c8047c70987165f3e05e571d7836370ade9/aadwarf64/aadwarf64.rst#<!-- -->44call-frame-instructions
---
Patch is 51.43 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/121559.diff
14 Files Affected:
- (modified) llvm/lib/Target/AArch64/AArch64PointerAuth.cpp (+6-6)
- (modified) llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-cfi.ll (+1-1)
- (modified) llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-diff-scope-same-key.ll (+6-6)
- (modified) llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-non-leaf.ll (+6-6)
- (modified) llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-regsave.mir (+1-1)
- (modified) llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-diff-key.ll (+6-6)
- (modified) llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-sp-mod.mir (+17-17)
- (modified) llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-subtarget.ll (+3-3)
- (modified) llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-thunk.ll (+10-8)
- (modified) llvm/test/CodeGen/AArch64/pacbti-llvm-generated-funcs-2.ll (+2-2)
- (modified) llvm/test/CodeGen/AArch64/sign-return-address-cfi-negate-ra-state.ll (+12-12)
- (modified) llvm/test/CodeGen/AArch64/sign-return-address-pauth-lr.ll (+35-35)
- (modified) llvm/test/CodeGen/AArch64/sign-return-address.ll (+22-22)
- (modified) llvm/test/CodeGen/MIR/AArch64/return-address-signing.mir (+3-3)
``````````diff
diff --git a/llvm/lib/Target/AArch64/AArch64PointerAuth.cpp b/llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
index a290a5112d012f..c3bc70ad6f4275 100644
--- a/llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
+++ b/llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
@@ -144,20 +144,20 @@ void AArch64PointerAuth::signLR(MachineFunction &MF,
// No SEH opcode for this one; it doesn't materialize into an
// instruction on Windows.
if (MFnI.branchProtectionPAuthLR() && Subtarget->hasPAuthLR()) {
+ emitPACCFI(*Subtarget, MBB, MBBI, DL, MachineInstr::FrameSetup, EmitCFI);
BuildMI(MBB, MBBI, DL,
TII->get(MFnI.shouldSignWithBKey() ? AArch64::PACIBSPPC
: AArch64::PACIASPPC))
.setMIFlag(MachineInstr::FrameSetup)
->setPreInstrSymbol(MF, MFnI.getSigningInstrLabel());
- emitPACCFI(*Subtarget, MBB, MBBI, DL, MachineInstr::FrameSetup, EmitCFI);
} else {
BuildPACM(*Subtarget, MBB, MBBI, DL, MachineInstr::FrameSetup);
+ emitPACCFI(*Subtarget, MBB, MBBI, DL, MachineInstr::FrameSetup, EmitCFI);
BuildMI(MBB, MBBI, DL,
TII->get(MFnI.shouldSignWithBKey() ? AArch64::PACIBSP
: AArch64::PACIASP))
.setMIFlag(MachineInstr::FrameSetup)
->setPreInstrSymbol(MF, MFnI.getSigningInstrLabel());
- emitPACCFI(*Subtarget, MBB, MBBI, DL, MachineInstr::FrameSetup, EmitCFI);
}
if (!EmitCFI && NeedsWinCFI) {
@@ -212,19 +212,19 @@ void AArch64PointerAuth::authenticateLR(
if (MFnI->branchProtectionPAuthLR() && Subtarget->hasPAuthLR()) {
assert(PACSym && "No PAC instruction to refer to");
emitPACSymOffsetIntoX16(*TII, MBB, MBBI, DL, PACSym);
+ emitPACCFI(*Subtarget, MBB, MBBI, DL, MachineInstr::FrameDestroy,
+ EmitAsyncCFI);
BuildMI(MBB, MBBI, DL,
TII->get(UseBKey ? AArch64::AUTIBSPPCi : AArch64::AUTIASPPCi))
.addSym(PACSym)
.setMIFlag(MachineInstr::FrameDestroy);
- emitPACCFI(*Subtarget, MBB, MBBI, DL, MachineInstr::FrameDestroy,
- EmitAsyncCFI);
} else {
BuildPACM(*Subtarget, MBB, MBBI, DL, MachineInstr::FrameDestroy, PACSym);
+ emitPACCFI(*Subtarget, MBB, MBBI, DL, MachineInstr::FrameDestroy,
+ EmitAsyncCFI);
BuildMI(MBB, MBBI, DL,
TII->get(UseBKey ? AArch64::AUTIBSP : AArch64::AUTIASP))
.setMIFlag(MachineInstr::FrameDestroy);
- emitPACCFI(*Subtarget, MBB, MBBI, DL, MachineInstr::FrameDestroy,
- EmitAsyncCFI);
}
if (NeedsWinCFI) {
diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-cfi.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-cfi.ll
index 4bbbe40176313a..e7de54036245a6 100644
--- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-cfi.ll
+++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-cfi.ll
@@ -9,9 +9,9 @@ define void @a() "sign-return-address"="all" "sign-return-address-key"="b_key" {
; CHECK-LABEL: a: // @a
; CHECK: // %bb.0:
; CHECK-NEXT: .cfi_b_key_frame
+; CHECK-NEXT: .cfi_negate_ra_state
; V8A-NEXT: hint #27
; V83A-NEXT: pacibsp
-; CHECK-NEXT: .cfi_negate_ra_state
%1 = alloca i32, align 4
%2 = alloca i32, align 4
%3 = alloca i32, align 4
diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-diff-scope-same-key.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-diff-scope-same-key.ll
index 6a11bef08c7406..a26dda1d5c1f1d 100644
--- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-diff-scope-same-key.ll
+++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-diff-scope-same-key.ll
@@ -5,9 +5,9 @@
define void @a() "sign-return-address"="all" {
; CHECK-LABEL: a: // @a
-; V8A: hint #25
-; V83A: paciasp
-; CHECK-NEXT: .cfi_negate_ra_state
+; CHECK: .cfi_negate_ra_state
+; V8A-NEXT: hint #25
+; V83A-NEXT: paciasp
%1 = alloca i32, align 4
%2 = alloca i32, align 4
%3 = alloca i32, align 4
@@ -52,9 +52,9 @@ define void @b() "sign-return-address"="non-leaf" {
define void @c() "sign-return-address"="all" {
; CHECK-LABEL: c: // @c
-; V8A: hint #25
-; V83A: paciasp
-; CHECK-NEXT .cfi_negate_ra_state
+; CHECK: .cfi_negate_ra_state
+; V8A-NEXT: hint #25
+; V83A-NEXT: paciasp
%1 = alloca i32, align 4
%2 = alloca i32, align 4
%3 = alloca i32, align 4
diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-non-leaf.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-non-leaf.ll
index 1e7224683c6c89..064b2b78c7bc77 100644
--- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-non-leaf.ll
+++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-non-leaf.ll
@@ -8,8 +8,8 @@ define i64 @a(i64 %x) "sign-return-address"="non-leaf" "sign-return-address-key"
; V8A-LABEL: a:
; V8A: // %bb.0:
; V8A-NEXT: .cfi_b_key_frame
-; V8A-NEXT: hint #27
; V8A-NEXT: .cfi_negate_ra_state
+; V8A-NEXT: hint #27
; V8A-NEXT: sub sp, sp, #32
; V8A-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
; V8A-NEXT: .cfi_def_cfa_offset 32
@@ -26,8 +26,8 @@ define i64 @a(i64 %x) "sign-return-address"="non-leaf" "sign-return-address-key"
; V83A-LABEL: a:
; V83A: // %bb.0:
; V83A-NEXT: .cfi_b_key_frame
-; V83A-NEXT: pacibsp
; V83A-NEXT: .cfi_negate_ra_state
+; V83A-NEXT: pacibsp
; V83A-NEXT: sub sp, sp, #32
; V83A-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
; V83A-NEXT: .cfi_def_cfa_offset 32
@@ -59,8 +59,8 @@ define i64 @b(i64 %x) "sign-return-address"="non-leaf" "sign-return-address-key"
; V8A-LABEL: b:
; V8A: // %bb.0:
; V8A-NEXT: .cfi_b_key_frame
-; V8A-NEXT: hint #27
; V8A-NEXT: .cfi_negate_ra_state
+; V8A-NEXT: hint #27
; V8A-NEXT: sub sp, sp, #32
; V8A-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
; V8A-NEXT: .cfi_def_cfa_offset 32
@@ -77,8 +77,8 @@ define i64 @b(i64 %x) "sign-return-address"="non-leaf" "sign-return-address-key"
; V83A-LABEL: b:
; V83A: // %bb.0:
; V83A-NEXT: .cfi_b_key_frame
-; V83A-NEXT: pacibsp
; V83A-NEXT: .cfi_negate_ra_state
+; V83A-NEXT: pacibsp
; V83A-NEXT: sub sp, sp, #32
; V83A-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
; V83A-NEXT: .cfi_def_cfa_offset 32
@@ -110,8 +110,8 @@ define i64 @c(i64 %x) "sign-return-address"="non-leaf" "sign-return-address-key"
; V8A-LABEL: c:
; V8A: // %bb.0:
; V8A-NEXT: .cfi_b_key_frame
-; V8A-NEXT: hint #27
; V8A-NEXT: .cfi_negate_ra_state
+; V8A-NEXT: hint #27
; V8A-NEXT: sub sp, sp, #32
; V8A-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
; V8A-NEXT: .cfi_def_cfa_offset 32
@@ -128,8 +128,8 @@ define i64 @c(i64 %x) "sign-return-address"="non-leaf" "sign-return-address-key"
; V83A-LABEL: c:
; V83A: // %bb.0:
; V83A-NEXT: .cfi_b_key_frame
-; V83A-NEXT: pacibsp
; V83A-NEXT: .cfi_negate_ra_state
+; V83A-NEXT: pacibsp
; V83A-NEXT: sub sp, sp, #32
; V83A-NEXT: str x30, [sp, #16] // 8-byte Folded Spill
; V83A-NEXT: .cfi_def_cfa_offset 32
diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-regsave.mir b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-regsave.mir
index 9a983cbd6714ee..218ee6609c803d 100644
--- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-regsave.mir
+++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-regsave.mir
@@ -81,8 +81,8 @@ body: |
# CHECK: name: bar
# CHECK: bb.0:
# CHECK: frame-setup EMITBKEY
-# CHECK-NEXT: frame-setup PACIBSP implicit-def $lr, implicit $lr, implicit $sp
# CHECK-NEXT: frame-setup CFI_INSTRUCTION negate_ra_sign_state
+# CHECK-NEXT: frame-setup PACIBSP implicit-def $lr, implicit $lr, implicit $sp
# CHECK-NOT: OUTLINED_FUNCTION_
# CHECK: bb.1:
# CHECK-NOT: OUTLINED_FUNCTION_
diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-diff-key.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-diff-key.ll
index 87771f5de4f699..5c45373d8c1d69 100644
--- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-diff-key.ll
+++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-diff-key.ll
@@ -7,8 +7,8 @@
define void @a() "sign-return-address"="all" {
; V8A-LABEL: a:
; V8A: // %bb.0:
-; V8A-NEXT: hint #25
; V8A-NEXT: .cfi_negate_ra_state
+; V8A-NEXT: hint #25
; V8A-NEXT: sub sp, sp, #32
; V8A-NEXT: .cfi_def_cfa_offset 32
; V8A-NEXT: mov w8, #1 // =0x1
@@ -26,8 +26,8 @@ define void @a() "sign-return-address"="all" {
;
; V83A-LABEL: a:
; V83A: // %bb.0:
-; V83A-NEXT: paciasp
; V83A-NEXT: .cfi_negate_ra_state
+; V83A-NEXT: paciasp
; V83A-NEXT: sub sp, sp, #32
; V83A-NEXT: .cfi_def_cfa_offset 32
; V83A-NEXT: mov w8, #1 // =0x1
@@ -60,8 +60,8 @@ define void @b() "sign-return-address"="all" "sign-return-address-key"="b_key" {
; V8A-LABEL: b:
; V8A: // %bb.0:
; V8A-NEXT: .cfi_b_key_frame
-; V8A-NEXT: hint #27
; V8A-NEXT: .cfi_negate_ra_state
+; V8A-NEXT: hint #27
; V8A-NEXT: sub sp, sp, #32
; V8A-NEXT: .cfi_def_cfa_offset 32
; V8A-NEXT: mov w8, #1 // =0x1
@@ -80,8 +80,8 @@ define void @b() "sign-return-address"="all" "sign-return-address-key"="b_key" {
; V83A-LABEL: b:
; V83A: // %bb.0:
; V83A-NEXT: .cfi_b_key_frame
-; V83A-NEXT: pacibsp
; V83A-NEXT: .cfi_negate_ra_state
+; V83A-NEXT: pacibsp
; V83A-NEXT: sub sp, sp, #32
; V83A-NEXT: .cfi_def_cfa_offset 32
; V83A-NEXT: mov w8, #1 // =0x1
@@ -113,8 +113,8 @@ define void @b() "sign-return-address"="all" "sign-return-address-key"="b_key" {
define void @c() "sign-return-address"="all" {
; V8A-LABEL: c:
; V8A: // %bb.0:
-; V8A-NEXT: hint #25
; V8A-NEXT: .cfi_negate_ra_state
+; V8A-NEXT: hint #25
; V8A-NEXT: sub sp, sp, #32
; V8A-NEXT: .cfi_def_cfa_offset 32
; V8A-NEXT: mov w8, #1 // =0x1
@@ -132,8 +132,8 @@ define void @c() "sign-return-address"="all" {
;
; V83A-LABEL: c:
; V83A: // %bb.0:
-; V83A-NEXT: paciasp
; V83A-NEXT: .cfi_negate_ra_state
+; V83A-NEXT: paciasp
; V83A-NEXT: sub sp, sp, #32
; V83A-NEXT: .cfi_def_cfa_offset 32
; V83A-NEXT: mov w8, #1 // =0x1
diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-sp-mod.mir b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-sp-mod.mir
index 22e5edef2a9395..d4a4b886ec0e37 100644
--- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-sp-mod.mir
+++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-sp-mod.mir
@@ -86,11 +86,11 @@ body: |
# CHECK: body: |
# CHECK-NEXT: bb.0 (%ir-block.0):
# CHECK-NEXT: liveins: $lr
-# CHECK: frame-setup PACIASP implicit-def $lr, implicit $lr, implicit $sp
-# CHECK-NEXT: frame-setup CFI_INSTRUCTION negate_ra_sign_state
+# CHECK: frame-setup CFI_INSTRUCTION negate_ra_sign_state
+# CHECK-NEXT: frame-setup PACIASP implicit-def $lr, implicit $lr, implicit $sp
# CHECK: BL @[[OUTLINED_FUNC:OUTLINED_FUNCTION_[0-9]+]]
-# CHECK: frame-destroy AUTIASP implicit-def $lr, implicit $lr, implicit $sp
-# CHECK-NEXT: frame-destroy CFI_INSTRUCTION negate_ra_sign_state
+# CHECK: frame-destroy CFI_INSTRUCTION negate_ra_sign_state
+# CHECK-NEXT: frame-destroy AUTIASP implicit-def $lr, implicit $lr, implicit $sp
# CHECK-NEXT: RET undef $lr
...
@@ -119,11 +119,11 @@ body: |
# CHECK: body: |
# CHECK-NEXT: bb.0 (%ir-block.0):
# CHECK-NEXT: liveins: $lr
-# CHECK: frame-setup PACIASP implicit-def $lr, implicit $lr, implicit $sp
-# CHECK-NEXT: frame-setup CFI_INSTRUCTION negate_ra_sign_state
+# CHECK: frame-setup CFI_INSTRUCTION negate_ra_sign_state
+# CHECK-NEXT: frame-setup PACIASP implicit-def $lr, implicit $lr, implicit $sp
# CHECK: BL @[[OUTLINED_FUNC]]
-# CHECK: frame-destroy AUTIASP implicit-def $lr, implicit $lr, implicit $sp
-# CHECK-NEXT: frame-destroy CFI_INSTRUCTION negate_ra_sign_state
+# CHECK: frame-destroy CFI_INSTRUCTION negate_ra_sign_state
+# CHECK-NEXT: frame-destroy AUTIASP implicit-def $lr, implicit $lr, implicit $sp
# CHECK-NEXT: RET undef $lr
...
@@ -174,22 +174,22 @@ body: |
# CHECK: body: |
# CHECK-NEXT: bb.0 (%ir-block.0):
# CHECK-NEXT: liveins: $lr
-# CHECK: frame-setup PACIASP implicit-def $lr, implicit $lr, implicit $sp
-# CHECK-NEXT: frame-setup CFI_INSTRUCTION negate_ra_sign_state
+# CHECK: frame-setup CFI_INSTRUCTION negate_ra_sign_state
+# CHECK-NEXT: frame-setup PACIASP implicit-def $lr, implicit $lr, implicit $sp
# CHECK-NOT: BL @OUTLINED_FUNCTION_{{.*}}
-# CHECK: frame-destroy AUTIASP implicit-def $lr, implicit $lr, implicit $sp
-# CHECK-NEXT: frame-destroy CFI_INSTRUCTION negate_ra_sign_state
+# CHECK: frame-destroy CFI_INSTRUCTION negate_ra_sign_state
+# CHECK-NEXT: frame-destroy AUTIASP implicit-def $lr, implicit $lr, implicit $sp
# CHECK-NEXT: RET undef $lr
# CHECK-LABEL: name: illegal1
# CHECK: body: |
# CHECK-NEXT: bb.0 (%ir-block.0):
# CHECK-NEXT: liveins: $lr
-# CHECK: frame-setup PACIASP implicit-def $lr, implicit $lr, implicit $sp
-# CHECK-NEXT: frame-setup CFI_INSTRUCTION negate_ra_sign_state
+# CHECK: frame-setup CFI_INSTRUCTION negate_ra_sign_state
+# CHECK-NEXT: frame-setup PACIASP implicit-def $lr, implicit $lr, implicit $sp
# CHECK-NOT: BL @OUTLINED_FUNCTION_{{.*}}
-# CHECK: frame-destroy AUTIASP implicit-def $lr, implicit $lr, implicit $sp
-# CHECK-NEXT: frame-destroy CFI_INSTRUCTION negate_ra_sign_state
+# CHECK: frame-destroy CFI_INSTRUCTION negate_ra_sign_state
+# CHECK-NEXT: frame-destroy AUTIASP implicit-def $lr, implicit $lr, implicit $sp
# CHECK-NEXT: RET undef $lr
# Outlined function that contains only legal sp modifications
@@ -198,8 +198,8 @@ body: |
# CHECK-NEXT: bb.0:
# CHECK-NEXT: liveins: $lr
# CHECK-NEXT: {{^ $}}
-# CHECK-NEXT: frame-setup PACIASP implicit-def $lr, implicit $lr, implicit $sp
# CHECK-NEXT: frame-setup CFI_INSTRUCTION negate_ra_sign_state
+# CHECK-NEXT: frame-setup PACIASP implicit-def $lr, implicit $lr, implicit $sp
# CHECK-NEXT: $sp = frame-setup SUBXri $sp, 16, 0
# CHECK: $sp = frame-destroy ADDXri $sp, 16, 0
# CHECK-NEXT: frame-destroy AUTIASP implicit-def $lr, implicit $lr, implicit $sp
diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-subtarget.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-subtarget.ll
index a7ea32952f3b78..cb43b3ba3e47e0 100644
--- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-subtarget.ll
+++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-subtarget.ll
@@ -9,8 +9,8 @@ define void @a() #0 {
; CHECK-LABEL: a: // @a
; CHECK: // %bb.0:
; CHECK-NEXT: .cfi_b_key_frame
-; CHECK-NEXT: pacibsp
; CHECK-NEXT: .cfi_negate_ra_state
+; CHECK-NEXT: pacibsp
; CHECK-NOT: OUTLINED_FUNCTION_
%1 = alloca i32, align 4
%2 = alloca i32, align 4
@@ -33,8 +33,8 @@ define void @b() #0 {
; CHECK-LABEL: b: // @b
; CHECK: // %bb.0:
; CHECK-NEXT: .cfi_b_key_frame
-; CHECK-NEXT: pacibsp
; CHECK-NEXT: .cfi_negate_ra_state
+; CHECK-NEXT: pacibsp
; CHECK-NOT: OUTLINED_FUNCTION_
%1 = alloca i32, align 4
%2 = alloca i32, align 4
@@ -57,8 +57,8 @@ define void @c() #1 {
; CHECK-LABEL: c: // @c
; CHECK: // %bb.0:
; CHECK-NEXT: .cfi_b_key_frame
-; CHECK-NEXT: hint #27
; CHECK-NEXT: .cfi_negate_ra_state
+; CHECK-NEXT: hint #27
; CHECK-NOT: OUTLINED_FUNCTION_
%1 = alloca i32, align 4
%2 = alloca i32, align 4
diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-thunk.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-thunk.ll
index da68ea5bf0dbcb..0ba4455532925c 100644
--- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-thunk.ll
+++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-thunk.ll
@@ -10,8 +10,8 @@ declare i32 @thunk_called_fn(i32, i32, i32, i32)
define i32 @a() #0 {
; V8A-LABEL: a:
; V8A: // %bb.0: // %entry
-; V8A-NEXT: hint #25
; V8A-NEXT: .cfi_negate_ra_state
+; V8A-NEXT: hint #25
; V8A-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; V8A-NEXT: .cfi_def_cfa_offset 16
; V8A-NEXT: .cfi_offset w30, -16
@@ -27,8 +27,8 @@ define i32 @a() #0 {
;
; V83A-LABEL: a:
; V83A: // %bb.0: // %entry
-; V83A-NEXT: paciasp
; V83A-NEXT: .cfi_negate_ra_state
+; V83A-NEXT: paciasp
; V83A-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; V83A-NEXT: .cfi_def_cfa_offset 16
; V83A-NEXT: .cfi_offset w30, -16
@@ -49,8 +49,8 @@ entry:
define i32 @b() #0 {
; V8A-LABEL: b:
; V8A: // %bb.0: // %entry
-; V8A-NEXT: hint #25
; V8A-NEXT: .cfi_negate_ra_state
+; V8A-NEXT: hint #25
; V8A-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; V8A-NEXT: .cfi_def_cfa_offset 16
; V8A-NEXT: .cfi_offset w30, -16
@@ -66,8 +66,8 @@ define i32 @b() #0 {
;
; V83A-LABEL: b:
; V83A: // %bb.0: // %entry
-; V83A-NEXT: paciasp
; V83A-NEXT: .cfi_negate_ra_state
+; V83A-NEXT: paciasp
; V83A-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; V83A-NEXT: .cfi_def_cfa_offset 16
; V83A-NEXT: .cfi_offset w30, -16
@@ -88,8 +88,8 @@ entry:
define hidden i32 @c(ptr %fptr) #0 {
; V8A-LABEL: c:
; V8A: // %bb.0: // %entry
-; V8A-NEXT: hint #25
; V8A-NEXT: .cfi_negate_ra_state
+; V8A-NEXT: hint #25
; V8A-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; V8A-NEXT: .cfi_def_cfa_offset 16
; V8A-NEXT: .cfi_offset w30, -16
@@ -106,8 +106,8 @@ define hidden i32 @c(ptr %fptr) #0 {
;
; V83A-LABEL: c:
; V83A: // %bb.0: // %entry
-; V83A-NEXT: paciasp
; V83A-NEXT: .cfi_negate_ra_state
+; V83A-NEXT: paciasp
; V83A-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; V83A-NEXT: .cfi_def_cfa_offset 16
; V83A-NEXT: .cfi_offset w30, -16
@@ -129,8 +129,8 @@ entry:
define hidden i32 @d(ptr %fptr) #0 {
; V8A-LABEL: d:
; V8A: // %bb.0: // %entry
-; V8A-NEXT: hint #25
; V8A-NEXT: .cfi_negate_ra_state
+; V8A-NEXT: hint #25
; V8A-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; V8A-NEXT: .cfi_def_cfa_offset 16
; V8A-NEXT: .cfi_offset w30, -16
@@ -147,8 +147,8 @@ define hidden i32 @d(ptr %fptr) #0 {
;
; V83A-LABEL: d:
; V83A: // %bb.0: // %entry
-; V83A-NEXT: paciasp
; V83A-NEXT: .cfi_negate_ra_state
+; V83A-NEXT: paciasp
; V83A-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; V83A-NEXT: .cfi_def_cfa_offset 16
; V83A-NEXT: .cfi_offset w30, -16
@@ -176,3 +176,5 @@ attributes #0 = { "sign-return-address"="non-leaf" minsize }
; CHECK-NOT: .cfi_negate_ra_state
; CHECK-NOT: auti{{[a,b]}}sp
; CHECK-NOT: hint #{{[29,31]}}
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; CHECK: {{.*}}
diff --git a/llvm/test/CodeGen/AArch64/pacbti-llvm-generated-funcs-2.ll b/llvm/test/CodeGen/AArch64/pacbti-llvm-generated-funcs-2.ll
index 373c4969a9405c..f823d2aa82ac02 100644
--- a/llvm/test/CodeGen/AArch64/pacbti-llvm-generated-f...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/121559
More information about the llvm-commits
mailing list