[llvm] [RISCV][TTI] Simplify compound check for readability [nfc] (PR #121504)

Philip Reames via llvm-commits llvm-commits at lists.llvm.org
Thu Jan 2 09:23:07 PST 2025


https://github.com/preames updated https://github.com/llvm/llvm-project/pull/121504

>From 736f1d28bb2eaeecf896910e9ef9ec90cd36eb9c Mon Sep 17 00:00:00 2001
From: Philip Reames <preames at rivosinc.com>
Date: Thu, 2 Jan 2025 09:06:26 -0800
Subject: [PATCH 1/2] [RISCV][TTI] Simplify compound check for readability
 [nfc]

I misread this check earlier today on a review, so restructure it to
be easier to quickly scan.
---
 llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
index 0abb270edcabc8..13500381305168 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
@@ -2558,8 +2558,10 @@ RISCVTTIImpl::enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const {
   TTI::MemCmpExpansionOptions Options;
   // TODO: Enable expansion when unaligned access is not supported after we fix
   // issues in ExpandMemcmp.
-  if (!(ST->enableUnalignedScalarMem() &&
-        (ST->hasStdExtZbb() || ST->hasStdExtZbkb() || IsZeroCmp)))
+  if (!ST->enableUnalignedScalarMem())
+    return Options;
+
+  if (!(ST->hasStdExtZbb() || ST->hasStdExtZbkb() || IsZeroCmp))
     return Options;
 
   Options.AllowOverlappingLoads = true;

>From 645bfec70a803664f0c259298614c473a0af54bf Mon Sep 17 00:00:00 2001
From: Philip Reames <preames at rivosinc.com>
Date: Thu, 2 Jan 2025 09:16:30 -0800
Subject: [PATCH 2/2] Address review comment

---
 llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
index 13500381305168..909a64e9742554 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
@@ -2561,7 +2561,7 @@ RISCVTTIImpl::enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const {
   if (!ST->enableUnalignedScalarMem())
     return Options;
 
-  if (!(ST->hasStdExtZbb() || ST->hasStdExtZbkb() || IsZeroCmp))
+  if (!ST->hasStdExtZbb() && !ST->hasStdExtZbkb() && !IsZeroCmp)
     return Options;
 
   Options.AllowOverlappingLoads = true;



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