[llvm] [M68k] always use movem for register spills (PR #106715)

via llvm-commits llvm-commits at lists.llvm.org
Thu Jan 2 07:35:22 PST 2025


github-actions[bot] wrote:

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git-clang-format --diff fdf72c992b2781de3f6c78698164e55a031a268e a42ca920c98885eeb4d30fac073251e1bf4be60e --extensions cpp -- llvm/lib/Target/M68k/M68kExpandPseudo.cpp llvm/lib/Target/M68k/M68kInstrInfo.cpp
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View the diff from clang-format here.
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diff --git a/llvm/lib/Target/M68k/M68kInstrInfo.cpp b/llvm/lib/Target/M68k/M68kInstrInfo.cpp
index a6e3c155e8a..f7d4e7ffd1b 100644
--- a/llvm/lib/Target/M68k/M68kInstrInfo.cpp
+++ b/llvm/lib/Target/M68k/M68kInstrInfo.cpp
@@ -728,7 +728,8 @@ unsigned getLoadStoreRegOpcode(unsigned Reg, const TargetRegisterClass *RC,
                                const M68kSubtarget &STI, bool load) {
   switch (TRI->getSpillSize(*RC)) {
   default:
-    LLVM_DEBUG(dbgs() << "Cannot determine appropriate opcode for load/store to/from "
+    LLVM_DEBUG(
+        dbgs() << "Cannot determine appropriate opcode for load/store to/from "
                << TRI->getName(Reg) << " of class " << TRI->getRegClassName(RC)
                << " with spill size " << TRI->getSpillSize(*RC) << '\n');
     llvm_unreachable("Unknown spill size");
@@ -739,7 +740,7 @@ unsigned getLoadStoreRegOpcode(unsigned Reg, const TargetRegisterClass *RC,
       return load ? M68k::MOVM16mp_P : M68k::MOVM16pm_P;
     if (M68k::CCRCRegClass.hasSubClassEq(RC))
       return load ? M68k::MOVM16mp_P : M68k::MOVM16pm_P;
-    llvm_unreachable("Unknown 2-byte regclass");    
+    llvm_unreachable("Unknown 2-byte regclass");
   case 4:
     if (M68k::XR32RegClass.hasSubClassEq(RC))
       return load ? M68k::MOVM32mp_P : M68k::MOVM32pm_P;

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https://github.com/llvm/llvm-project/pull/106715


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