[llvm] [AMDGPU] Implement IR variant of isFMAFasterThanFMulAndFAdd (PR #121465)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 2 03:07:21 PST 2025
================
@@ -16942,6 +16969,37 @@ bool SITargetLowering::checkForPhysRegDependency(
return false;
}
+/// Check if it is profitable to hoist instruction in then/else to if.
+/// Not profitable if I and it's user can form a FMA instruction
+/// because we prefer FMSUB/FMADD.
+bool SITargetLowering::isProfitableToHoist(Instruction *I) const {
+ if (!I->hasOneUse())
+ return true;
+
+ Instruction *User = I->user_back();
+ // TODO: Add more patterns that are not profitable to hoist
+ switch (I->getOpcode()) {
+ case Instruction::FMul: {
+ if (User->getOpcode() != Instruction::FSub &&
+ User->getOpcode() != Instruction::FAdd)
+ return true;
+
+ const TargetOptions &Options = getTargetMachine().Options;
+ const Function *F = I->getFunction();
+ const DataLayout &DL = F->getDataLayout();
+ Type *Ty = User->getOperand(0)->getType();
----------------
arsenm wrote:
Can just take the result type
https://github.com/llvm/llvm-project/pull/121465
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