[llvm] [AMDGPU] Implement IR variant of isFMAFasterThanFMulAndFAdd (PR #121465)

[Matt Arsenault via llvm-commits]

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@@ -16942,6 +16969,37 @@ bool SITargetLowering::checkForPhysRegDependency(
   return false;
 }
 
+/// Check if it is profitable to hoist instruction in then/else to if.
+/// Not profitable if I and it's user can form a FMA instruction
+/// because we prefer FMSUB/FMADD.
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arsenm wrote:

Copy paste, these opcodes don't exist 

https://github.com/llvm/llvm-project/pull/121465