[clang] [llvm] [ARM] Emit an error when the hard-float ABI is enabled but can't be used. (PR #111334)

[Chris Copeland via llvm-commits]

chrisnc wrote:

> RISC-V has similar checks here:
> 
> https://github.com/llvm/llvm-project/blob/ed572f2003275da8e06a634b4d6658b7921e8334/llvm/lib/Target/RISCV/RISCVISelLowering.cpp#L88-L100
> 
> So maybe the ARM checks could be added in a similar place? RISC-V handles ABI variants in a very clean way, and it does seem to work in practice too, so it'd be a good model for other architectures to follow.

I could try this approach here and see how it goes.

https://github.com/llvm/llvm-project/pull/111334