[clang] [llvm] [RISC-V] Add support for MIPS P8700 CPU (PR #117865)

[Djordje Todorovic via llvm-commits]

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@@ -2017,6 +2169,74 @@ def : Pat<(binop_allwusers<add> GPR:$rs1, (AddiPair:$rs2)),
 }
 
 //===----------------------------------------------------------------------===//
+
+// MIPS extensions
+//===----------------------------------------------------------------------===//
+
+let Predicates = [UsesMIPSCMov] in {
+def : Pat<(select (XLenVT (setne (XLenVT GPR:$rs2), (XLenVT 0))),
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djtodoro wrote:

I have tried, but have not achieved to make a pattern that matches all the combinations. An alternative can be to add new `riscv_mips_setcc` ComplexPattern I guess.

https://github.com/llvm/llvm-project/pull/117865