[llvm] e3fe41c - [RISCV] Add missing ReadFMA16Addend in UnsupportedSchedZfh

[Wang Pengcheng via llvm-commits]

Author: Wang Pengcheng
Date: 2024-12-31T17:22:08+08:00
New Revision: e3fe41cdf5583d3a2f7454c76fa5cadccdccaf22

URL: https://github.com/llvm/llvm-project/commit/e3fe41cdf5583d3a2f7454c76fa5cadccdccaf22
DIFF: https://github.com/llvm/llvm-project/commit/e3fe41cdf5583d3a2f7454c76fa5cadccdccaf22.diff

LOG: [RISCV] Add missing ReadFMA16Addend in UnsupportedSchedZfh

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVSchedule.td

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVSchedule.td b/llvm/lib/Target/RISCV/RISCVSchedule.td
index 7946a746efd029..ceaeb85d421fff 100644
--- a/llvm/lib/Target/RISCV/RISCVSchedule.td
+++ b/llvm/lib/Target/RISCV/RISCVSchedule.td
@@ -237,6 +237,7 @@ def : ReadAdvance<ReadFCvtF16ToI32, 0>;
 def : ReadAdvance<ReadFDiv16, 0>;
 def : ReadAdvance<ReadFCmp16, 0>;
 def : ReadAdvance<ReadFMA16, 0>;
+def : ReadAdvance<ReadFMA16Addend, 0>;
 def : ReadAdvance<ReadFMinMax16, 0>;
 def : ReadAdvance<ReadFMul16, 0>;
 def : ReadAdvance<ReadFSGNJ16, 0>;