[llvm] Add SD matchers and unit test coverage for ISD::VECTOR_SHUFFLE (PR #119592)

Min-Yih Hsu via llvm-commits llvm-commits at lists.llvm.org
Mon Dec 30 10:41:37 PST 2024


================
@@ -547,6 +547,39 @@ struct BinaryOpc_match {
   }
 };
 
+/// Matching while capturing mask
+template <typename T0, typename T1, typename T2> struct SDShuffle_match {
+  T0 Op1;
+  T1 Op2;
+  T2 Mask;
+
+  SDShuffle_match(const T0 &Op1, const T1 &Op2, const T2 &Mask)
+      : Op1(Op1), Op2(Op2), Mask(Mask) {}
+
+  template <typename MatchContext>
+  bool match(const MatchContext &Ctx, SDValue N) {
+    if (auto *I = dyn_cast<ShuffleVectorSDNode>(N)) {
+      return Op1.match(Ctx, I->getOperand(0)) &&
+             Op2.match(Ctx, I->getOperand(1)) && Mask.match(I->getMask());
+    }
+    return false;
+  }
+};
+struct m_Mask {
+  ArrayRef<int> MaskRef;
----------------
mshockwave wrote:

> * Are we trying to avoid a copy of the `Length` field

slightly tangent to this issue: the reason ArrayRef is trivially copyable, or, why we prefer copy by value is that ArrayRef only has two fields, and modern processors + ABI almost certain will pass these two fields in two registers. If we pass by reference, I think the compiler has to put the ArrayRef object on memory because we can only take address from lvalue. Once that happens, it's slower than passing by two registers.

https://github.com/llvm/llvm-project/pull/119592


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