[llvm] [Xtensa] Implement Windowed Register Option. (PR #121118)

[Andrei Safronov via llvm-commits]

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@@ -198,6 +200,11 @@ struct XtensaOperand : public MCParsedAsmOperand {
 
   bool isImm32n_95() const { return isImm(-32, 95); }
 
+  bool isImm64n_4n() const {
+    return isImm(-64, -4) &&
+           ((dyn_cast<MCConstantExpr>(getImm())->getValue() & 0x3) == 0);
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andreisfr wrote:

Thank you very much for comments. I corrected code and use cast instead of dyn_cast. About "getImm", you mean that getImm should return integer value instead of MCExpr or we should rename getImm() function? Actually I used the same approach (by analogy) with "getImm" function like it is done in ARM backend(https://github.com/llvm/llvm-project/blob/6cbc64ed922cc69bc292d394ba5c681fa309f404/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp#L1017) and in some other backends. 

https://github.com/llvm/llvm-project/pull/121118