[llvm] [Xtensa] Implement Windowed Register Option. (PR #121118)
Andrei Safronov via llvm-commits
llvm-commits at lists.llvm.org
Sun Dec 29 07:04:45 PST 2024
================
@@ -117,6 +131,13 @@ def offset4m32 : Immediate<i32,
[{ return Imm >= 0 && Imm <= 60 && (Imm & 0x3 == 0); }],
"Offset4m32_AsmOperand">;
+// entry_imm12 predicate - Immediate in the range [0,32760], ENTRY parameter
+def Entry_Imm12_AsmOperand: ImmAsmOperand<"entry_imm12">;
+def entry_imm12: Immediate<i32, [{ return Imm >= 0 && Imm <= 32760 && (Imm & 0x3 == 0); }], "Entry_Imm12_AsmOperand"> {
----------------
andreisfr wrote:
Fixed.
https://github.com/llvm/llvm-project/pull/121118
More information about the llvm-commits
mailing list