[llvm] [TableGen][GISel] Learn to import patterns with physreg defs (PR #120343)

[Sergei Barannikov via llvm-commits]

================
@@ -801,6 +794,14 @@ def SReg_32_XM0 : SIRegisterClass<"AMDGPU", [i32, f32, i16, f16, bf16, v2i16, v2
 
 } // End GeneratePressureSet = 0
 
+def SCC_CLASS : SIRegisterClass<"AMDGPU", [i1], 1, (add SCC)> {
+  let CopyCost = -1;
+  let isAllocatable = 0;
+  let CrossCopyRegClass = SReg_32_XM0_XEXEC;
----------------
s-barannikov wrote:

I don't know if this is correct. The class is the one returned by `getCrossCopyRegClass` in Wave32 case.

https://github.com/llvm/llvm-project/pull/120343