[llvm] [GlobalISel] Catching inconsistencies in load memory, result, and range metadata type (PR #121247)

[Renat Idrisov via llvm-commits]

https://github.com/parsifal-47 created https://github.com/llvm/llvm-project/pull/121247

This is a fix for:
https://github.com/llvm/llvm-project/issues/97290
Please let me know if that is the right way to address the issue. Thank you!

>From 565ba0e9889a5d147409517005586b4af6522f48 Mon Sep 17 00:00:00 2001
From: Renat Idrisov <parsifal-47 at users.noreply.github.com>
Date: Sat, 28 Dec 2024 04:07:30 +0000
Subject: [PATCH] Catching inconsistencies in load memory, result, and range
 metadata type

---
 llvm/lib/CodeGen/MachineVerifier.cpp          |  6 +++++
 .../test_g_load_vector_to_scalar.mir          | 25 +++++++++++++++++++
 2 files changed, 31 insertions(+)
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/test_g_load_vector_to_scalar.mir

diff --git a/llvm/lib/CodeGen/MachineVerifier.cpp b/llvm/lib/CodeGen/MachineVerifier.cpp
index bec36b728ae328..1866d3ae2b285a 100644
--- a/llvm/lib/CodeGen/MachineVerifier.cpp
+++ b/llvm/lib/CodeGen/MachineVerifier.cpp
@@ -1274,6 +1274,12 @@ void MachineVerifier::verifyPreISelGenericInstruction(const MachineInstr *MI) {
         if (TypeSize::isKnownGT(MMO.getSize().getValue(),
                                 ValTy.getSizeInBytes()))
           report("load memory size cannot exceed result size", MI);
+
+        if (MMO.getRanges() && (ValTy.isVector() != MMO.getType().isVector())) {
+          report("scalar operands cannot be loaded into vector values and vice "
+                 "versa",
+                 MI);
+        }
       } else if (MI->getOpcode() == TargetOpcode::G_STORE) {
         if (TypeSize::isKnownLT(ValTy.getSizeInBytes(),
                                 MMO.getSize().getValue()))
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/test_g_load_vector_to_scalar.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/test_g_load_vector_to_scalar.mir
new file mode 100644
index 00000000000000..95429127c30d0c
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/test_g_load_vector_to_scalar.mir
@@ -0,0 +1,25 @@
+# RUN: not --crash llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=amdgpu-prelegalizer-combiner -verify-machineinstrs %s -o -
+--- |
+  define void @range_metadata_sext_i33_signed_range_i64_load_as_v2i32() {
+    ret void
+  }
+
+  !1 = !{i64 -8589934591, i64 8589934592}
+
+...
+---
+name:            range_metadata_sext_i33_signed_range_i64_load_as_v2i32
+tracksRegLiveness: true
+body:             |
+  bb.0:
+    liveins: $vgpr0, $vgpr1
+
+    %1:_(s32) = COPY $vgpr0
+    %2:_(s32) = COPY $vgpr1
+    %0:_(p1) = G_MERGE_VALUES %1(s32), %2(s32)
+    ; CHECK: Bad machine code: scalar operands cannot be loaded into vector values
+    %3:_(<2 x s32>) = G_LOAD %0(p1) :: (volatile load (s64), align 4, !range !1, addrspace 1)
+    $vgpr0_vgpr1 = COPY %3
+    SI_RETURN implicit $vgpr0_vgpr1
+
+...