[llvm] [AMDGPU] Handle nontemporal and amdgpu.last.use metadata in amdgpu-lower-buffer-fat-pointers (PR #120139)
Acim Maravic via llvm-commits
llvm-commits at lists.llvm.org
Fri Dec 27 09:20:57 PST 2024
https://github.com/Acim-Maravic updated https://github.com/llvm/llvm-project/pull/120139
>From a942c6b3eaf29127e99f8533ff7f02cf02f188eb Mon Sep 17 00:00:00 2001
From: Acim Maravic <Acim.Maravic at amd.com>
Date: Fri, 27 Dec 2024 18:12:56 +0100
Subject: [PATCH] [AMDGPU] Handle nontemporal and amdgpu.last.use metadata in
amdgpu-lower-buffer-fat-pointers
---
.../AMDGPU/AMDGPULowerBufferFatPointers.cpp | 12 -
llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 5 +
.../lower-buffer-fat-pointers-memops.ll | 20 +-
...wer-buffer-fat-pointers-memory-metadata.ll | 719 ++++++++++++++++++
4 files changed, 734 insertions(+), 22 deletions(-)
create mode 100644 llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-memory-metadata.ll
diff --git a/llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp b/llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
index c7cdd7a37282c7..8c6ea5f9bd0f81 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
@@ -1074,18 +1074,6 @@ Value *SplitPtrStructs::handleMemoryInst(Instruction *I, Value *Arg, Value *Ptr,
Args.push_back(IRB.getInt32(0));
uint32_t Aux = 0;
- bool IsInvariant =
- (isa<LoadInst>(I) && I->getMetadata(LLVMContext::MD_invariant_load));
- bool IsNonTemporal = I->getMetadata(LLVMContext::MD_nontemporal);
- // Atomic loads and stores need glc, atomic read-modify-write doesn't.
- bool IsOneWayAtomic =
- !isa<AtomicRMWInst>(I) && Order != AtomicOrdering::NotAtomic;
- if (IsOneWayAtomic)
- Aux |= AMDGPU::CPol::GLC;
- if (IsNonTemporal && !IsInvariant)
- Aux |= AMDGPU::CPol::SLC;
- if (isa<LoadInst>(I) && ST->getGeneration() == AMDGPUSubtarget::GFX10)
- Aux |= (Aux & AMDGPU::CPol::GLC ? AMDGPU::CPol::DLC : 0);
if (IsVolatile)
Aux |= AMDGPU::CPol::VOLATILE;
Args.push_back(IRB.getInt32(Aux));
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index 7da93f90341d22..f7aa9e84ec8596 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -1240,6 +1240,11 @@ bool SITargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
}
Info.flags |= MachineMemOperand::MODereferenceable;
+
+ if (CI.hasMetadata(LLVMContext::MD_nontemporal))
+ Info.flags |= MachineMemOperand::MONonTemporal;
+ Info.flags |= getTargetMMOFlags(CI);
+
if (ME.onlyReadsMemory()) {
if (RsrcIntr->IsImage) {
unsigned MaxNumLanes = 4;
diff --git a/llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-memops.ll b/llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-memops.ll
index 57028a0f9b14f3..75cf0615b2b537 100644
--- a/llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-memops.ll
+++ b/llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-memops.ll
@@ -11,16 +11,16 @@ define void @loads(ptr addrspace(8) %buf) {
; CHECK-NEXT: [[SCALAR:%.*]] = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) align 4 [[BUF]], i32 16, i32 0, i32 0)
; CHECK-NEXT: [[VEC2:%.*]] = call <2 x float> @llvm.amdgcn.raw.ptr.buffer.load.v2f32(ptr addrspace(8) align 8 [[BUF]], i32 16, i32 0, i32 0)
; CHECK-NEXT: [[VEC4:%.*]] = call <4 x float> @llvm.amdgcn.raw.ptr.buffer.load.v4f32(ptr addrspace(8) align 16 [[BUF]], i32 16, i32 0, i32 0)
-; CHECK-NEXT: [[NONTEMPORAL:%.*]] = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) align 4 [[BUF]], i32 16, i32 0, i32 2), !nontemporal [[META0:![0-9]+]]
+; CHECK-NEXT: [[NONTEMPORAL:%.*]] = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) align 4 [[BUF]], i32 16, i32 0, i32 0), !nontemporal [[META0:![0-9]+]]
; CHECK-NEXT: [[INVARIANT:%.*]] = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) align 4 [[BUF]], i32 16, i32 0, i32 0), !invariant.load [[META1:![0-9]+]]
; CHECK-NEXT: [[NONTEMPORAL_INVARIANT:%.*]] = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) align 4 [[BUF]], i32 16, i32 0, i32 0), !invariant.load [[META1]], !nontemporal [[META0]]
; CHECK-NEXT: [[VOLATILE:%.*]] = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) align 4 [[BUF]], i32 16, i32 0, i32 -2147483648)
-; CHECK-NEXT: [[VOLATILE_NONTEMPORAL:%.*]] = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) align 4 [[BUF]], i32 16, i32 0, i32 -2147483646), !nontemporal [[META0]]
+; CHECK-NEXT: [[VOLATILE_NONTEMPORAL:%.*]] = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) align 4 [[BUF]], i32 16, i32 0, i32 -2147483648), !nontemporal [[META0]]
; CHECK-NEXT: fence syncscope("wavefront") release
-; CHECK-NEXT: [[ATOMIC:%.*]] = call float @llvm.amdgcn.raw.ptr.atomic.buffer.load.f32(ptr addrspace(8) align 4 [[BUF]], i32 16, i32 0, i32 -2147483647)
+; CHECK-NEXT: [[ATOMIC:%.*]] = call float @llvm.amdgcn.raw.ptr.atomic.buffer.load.f32(ptr addrspace(8) align 4 [[BUF]], i32 16, i32 0, i32 -2147483648)
; CHECK-NEXT: fence syncscope("wavefront") acquire
-; CHECK-NEXT: [[ATOMIC_MONOTONIC:%.*]] = call float @llvm.amdgcn.raw.ptr.atomic.buffer.load.f32(ptr addrspace(8) align 4 [[BUF]], i32 16, i32 0, i32 1)
-; CHECK-NEXT: [[ATOMIC_ACQUIRE:%.*]] = call float @llvm.amdgcn.raw.ptr.atomic.buffer.load.f32(ptr addrspace(8) align 4 [[BUF]], i32 16, i32 0, i32 1)
+; CHECK-NEXT: [[ATOMIC_MONOTONIC:%.*]] = call float @llvm.amdgcn.raw.ptr.atomic.buffer.load.f32(ptr addrspace(8) align 4 [[BUF]], i32 16, i32 0, i32 0)
+; CHECK-NEXT: [[ATOMIC_ACQUIRE:%.*]] = call float @llvm.amdgcn.raw.ptr.atomic.buffer.load.f32(ptr addrspace(8) align 4 [[BUF]], i32 16, i32 0, i32 0)
; CHECK-NEXT: fence acquire
; CHECK-NEXT: ret void
;
@@ -50,15 +50,15 @@ define void @stores(ptr addrspace(8) %buf, float %f, <4 x float> %f4) {
; CHECK-SAME: (ptr addrspace(8) [[BUF:%.*]], float [[F:%.*]], <4 x float> [[F4:%.*]]) #[[ATTR0]] {
; CHECK-NEXT: call void @llvm.amdgcn.raw.ptr.buffer.store.f32(float [[F]], ptr addrspace(8) align 4 [[BUF]], i32 16, i32 0, i32 0)
; CHECK-NEXT: call void @llvm.amdgcn.raw.ptr.buffer.store.v4f32(<4 x float> [[F4]], ptr addrspace(8) align 16 [[BUF]], i32 16, i32 0, i32 0)
-; CHECK-NEXT: call void @llvm.amdgcn.raw.ptr.buffer.store.f32(float [[F]], ptr addrspace(8) align 4 [[BUF]], i32 16, i32 0, i32 2), !nontemporal [[META0]]
+; CHECK-NEXT: call void @llvm.amdgcn.raw.ptr.buffer.store.f32(float [[F]], ptr addrspace(8) align 4 [[BUF]], i32 16, i32 0, i32 0), !nontemporal [[META0]]
; CHECK-NEXT: call void @llvm.amdgcn.raw.ptr.buffer.store.f32(float [[F]], ptr addrspace(8) align 4 [[BUF]], i32 16, i32 0, i32 -2147483648)
-; CHECK-NEXT: call void @llvm.amdgcn.raw.ptr.buffer.store.f32(float [[F]], ptr addrspace(8) align 4 [[BUF]], i32 16, i32 0, i32 -2147483646), !nontemporal [[META0]]
+; CHECK-NEXT: call void @llvm.amdgcn.raw.ptr.buffer.store.f32(float [[F]], ptr addrspace(8) align 4 [[BUF]], i32 16, i32 0, i32 -2147483648), !nontemporal [[META0]]
; CHECK-NEXT: fence syncscope("wavefront") release
-; CHECK-NEXT: call void @llvm.amdgcn.raw.ptr.buffer.store.f32(float [[F]], ptr addrspace(8) align 4 [[BUF]], i32 16, i32 0, i32 -2147483647)
+; CHECK-NEXT: call void @llvm.amdgcn.raw.ptr.buffer.store.f32(float [[F]], ptr addrspace(8) align 4 [[BUF]], i32 16, i32 0, i32 -2147483648)
; CHECK-NEXT: fence syncscope("wavefront") acquire
-; CHECK-NEXT: call void @llvm.amdgcn.raw.ptr.buffer.store.f32(float [[F]], ptr addrspace(8) align 4 [[BUF]], i32 16, i32 0, i32 1)
+; CHECK-NEXT: call void @llvm.amdgcn.raw.ptr.buffer.store.f32(float [[F]], ptr addrspace(8) align 4 [[BUF]], i32 16, i32 0, i32 0)
; CHECK-NEXT: fence release
-; CHECK-NEXT: call void @llvm.amdgcn.raw.ptr.buffer.store.f32(float [[F]], ptr addrspace(8) align 4 [[BUF]], i32 16, i32 0, i32 1)
+; CHECK-NEXT: call void @llvm.amdgcn.raw.ptr.buffer.store.f32(float [[F]], ptr addrspace(8) align 4 [[BUF]], i32 16, i32 0, i32 0)
; CHECK-NEXT: ret void
;
%base = addrspacecast ptr addrspace(8) %buf to ptr addrspace(7)
diff --git a/llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-memory-metadata.ll b/llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-memory-metadata.ll
new file mode 100644
index 00000000000000..bf4db45bb4140b
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-memory-metadata.ll
@@ -0,0 +1,719 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefix=GFX6 %s
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -mattr=+cumode < %s | FileCheck --check-prefix=GFX6 %s
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 < %s | FileCheck --check-prefix=GFX11 %s
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -mattr=+cumode < %s | FileCheck --check-prefix=GFX11 %s
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 < %s | FileCheck --check-prefix=GFX12 %s
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -mattr=+cumode < %s | FileCheck --check-prefix=GFX12 %s
+
+
+define amdgpu_kernel void @buffer_last_use_load_0(ptr addrspace(7) %in, ptr addrspace(7) %out) {
+; GFX6-LABEL: buffer_last_use_load_0:
+; GFX6: ; %bb.0: ; %entry
+; GFX6-NEXT: s_load_dwordx4 s[4:7], s[8:9], 0x0
+; GFX6-NEXT: s_load_dword s11, s[8:9], 0x10
+; GFX6-NEXT: s_mov_b32 s10, 0
+; GFX6-NEXT: s_add_u32 s0, s0, s15
+; GFX6-NEXT: s_mov_b32 s15, s10
+; GFX6-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6-NEXT: s_mov_b32 s14, s7
+; GFX6-NEXT: s_addc_u32 s1, s1, 0
+; GFX6-NEXT: s_mov_b32 s12, s5
+; GFX6-NEXT: s_or_b64 s[14:15], s[14:15], s[10:11]
+; GFX6-NEXT: s_mov_b32 s13, s6
+; GFX6-NEXT: v_mov_b32_e32 v0, s4
+; GFX6-NEXT: buffer_load_dword v0, v0, s[12:15], 0 offen
+; GFX6-NEXT: s_load_dword s11, s[8:9], 0x30
+; GFX6-NEXT: s_load_dwordx4 s[4:7], s[8:9], 0x20
+; GFX6-NEXT: s_mov_b32 s9, s10
+; GFX6-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6-NEXT: s_mov_b32 s8, s7
+; GFX6-NEXT: s_or_b64 s[10:11], s[8:9], s[10:11]
+; GFX6-NEXT: s_mov_b32 s8, s5
+; GFX6-NEXT: s_mov_b32 s9, s6
+; GFX6-NEXT: v_mov_b32_e32 v1, s4
+; GFX6-NEXT: s_waitcnt vmcnt(0)
+; GFX6-NEXT: buffer_store_dword v0, v1, s[8:11], 0 offen
+; GFX6-NEXT: s_endpgm
+;
+; GFX11-LABEL: buffer_last_use_load_0:
+; GFX11: ; %bb.0: ; %entry
+; GFX11-NEXT: s_clause 0x2
+; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX11-NEXT: s_load_b128 s[8:11], s[4:5], 0x20
+; GFX11-NEXT: s_load_b32 s6, s[4:5], 0x10
+; GFX11-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-NEXT: v_dual_mov_b32 v7, s8 :: v_dual_mov_b32 v8, s9
+; GFX11-NEXT: v_dual_mov_b32 v9, s10 :: v_dual_mov_b32 v10, s11
+; GFX11-NEXT: scratch_store_b128 off, v[0:3], off offset:32
+; GFX11-NEXT: s_clause 0x1
+; GFX11-NEXT: scratch_load_b64 v[5:6], off, off offset:40
+; GFX11-NEXT: scratch_load_b32 v4, off, off offset:36
+; GFX11-NEXT: s_load_b32 s1, s[4:5], 0x30
+; GFX11-NEXT: scratch_store_b128 off, v[7:10], off
+; GFX11-NEXT: s_clause 0x1
+; GFX11-NEXT: scratch_load_b64 v[1:2], off, off offset:8
+; GFX11-NEXT: scratch_load_b32 v0, off, off offset:4
+; GFX11-NEXT: v_mov_b32_e32 v7, s6
+; GFX11-NEXT: v_mov_b32_e32 v9, s0
+; GFX11-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-NEXT: v_mov_b32_e32 v3, s1
+; GFX11-NEXT: s_mov_b32 s1, exec_lo
+; GFX11-NEXT: s_waitcnt vmcnt(0)
+; GFX11-NEXT: .LBB0_1: ; =>This Inner Loop Header: Depth=1
+; GFX11-NEXT: v_readfirstlane_b32 s4, v4
+; GFX11-NEXT: v_readfirstlane_b32 s5, v5
+; GFX11-NEXT: v_readfirstlane_b32 s6, v6
+; GFX11-NEXT: v_readfirstlane_b32 s7, v7
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[4:5]
+; GFX11-NEXT: v_cmp_eq_u64_e64 s0, s[6:7], v[6:7]
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: s_and_b32 s0, vcc_lo, s0
+; GFX11-NEXT: s_and_saveexec_b32 s0, s0
+; GFX11-NEXT: buffer_load_b32 v8, v9, s[4:7], 0 offen
+; GFX11-NEXT: ; implicit-def: $vgpr4_vgpr5_vgpr6_vgpr7
+; GFX11-NEXT: ; implicit-def: $vgpr9
+; GFX11-NEXT: s_xor_b32 exec_lo, exec_lo, s0
+; GFX11-NEXT: s_cbranch_execnz .LBB0_1
+; GFX11-NEXT: ; %bb.2:
+; GFX11-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-NEXT: v_mov_b32_e32 v4, s8
+; GFX11-NEXT: s_mov_b32 s0, exec_lo
+; GFX11-NEXT: .LBB0_3: ; =>This Inner Loop Header: Depth=1
+; GFX11-NEXT: v_readfirstlane_b32 s4, v0
+; GFX11-NEXT: v_readfirstlane_b32 s5, v1
+; GFX11-NEXT: v_readfirstlane_b32 s6, v2
+; GFX11-NEXT: v_readfirstlane_b32 s7, v3
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[0:1]
+; GFX11-NEXT: v_cmp_eq_u64_e64 s0, s[6:7], v[2:3]
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: s_and_b32 s0, vcc_lo, s0
+; GFX11-NEXT: s_and_saveexec_b32 s0, s0
+; GFX11-NEXT: s_waitcnt vmcnt(0)
+; GFX11-NEXT: buffer_store_b32 v8, v4, s[4:7], 0 offen
+; GFX11-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
+; GFX11-NEXT: ; implicit-def: $vgpr8
+; GFX11-NEXT: ; implicit-def: $vgpr4
+; GFX11-NEXT: s_xor_b32 exec_lo, exec_lo, s0
+; GFX11-NEXT: s_cbranch_execnz .LBB0_3
+; GFX11-NEXT: ; %bb.4:
+; GFX11-NEXT: s_endpgm
+;
+; GFX12-LABEL: buffer_last_use_load_0:
+; GFX12: ; %bb.0: ; %entry
+; GFX12-NEXT: s_clause 0x2
+; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX12-NEXT: s_load_b128 s[8:11], s[4:5], 0x20
+; GFX12-NEXT: s_load_b32 s6, s[4:5], 0x10
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX12-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX12-NEXT: v_dual_mov_b32 v7, s8 :: v_dual_mov_b32 v8, s9
+; GFX12-NEXT: v_dual_mov_b32 v9, s10 :: v_dual_mov_b32 v10, s11
+; GFX12-NEXT: scratch_store_b128 off, v[0:3], off offset:32
+; GFX12-NEXT: s_clause 0x1
+; GFX12-NEXT: scratch_load_b64 v[5:6], off, off offset:40
+; GFX12-NEXT: scratch_load_b32 v4, off, off offset:36
+; GFX12-NEXT: s_load_b32 s1, s[4:5], 0x30
+; GFX12-NEXT: scratch_store_b128 off, v[7:10], off
+; GFX12-NEXT: s_clause 0x1
+; GFX12-NEXT: scratch_load_b64 v[1:2], off, off offset:8
+; GFX12-NEXT: scratch_load_b32 v0, off, off offset:4
+; GFX12-NEXT: v_mov_b32_e32 v7, s6
+; GFX12-NEXT: v_mov_b32_e32 v9, s0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_mov_b32_e32 v3, s1
+; GFX12-NEXT: s_mov_b32 s1, exec_lo
+; GFX12-NEXT: .LBB0_1: ; =>This Inner Loop Header: Depth=1
+; GFX12-NEXT: s_wait_loadcnt 0x2
+; GFX12-NEXT: v_readfirstlane_b32 s4, v4
+; GFX12-NEXT: v_readfirstlane_b32 s5, v5
+; GFX12-NEXT: v_readfirstlane_b32 s6, v6
+; GFX12-NEXT: v_readfirstlane_b32 s7, v7
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[4:5]
+; GFX12-NEXT: v_cmp_eq_u64_e64 s0, s[6:7], v[6:7]
+; GFX12-NEXT: s_wait_alu 0xfffe
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: s_and_b32 s0, vcc_lo, s0
+; GFX12-NEXT: s_wait_alu 0xfffe
+; GFX12-NEXT: s_and_saveexec_b32 s0, s0
+; GFX12-NEXT: s_wait_loadcnt 0x0
+; GFX12-NEXT: buffer_load_b32 v8, v9, s[4:7], null offen th:TH_LOAD_LU
+; GFX12-NEXT: ; implicit-def: $vgpr4_vgpr5_vgpr6_vgpr7
+; GFX12-NEXT: ; implicit-def: $vgpr9
+; GFX12-NEXT: s_wait_alu 0xfffe
+; GFX12-NEXT: s_xor_b32 exec_lo, exec_lo, s0
+; GFX12-NEXT: s_cbranch_execnz .LBB0_1
+; GFX12-NEXT: ; %bb.2:
+; GFX12-NEXT: s_mov_b32 exec_lo, s1
+; GFX12-NEXT: v_mov_b32_e32 v4, s8
+; GFX12-NEXT: s_mov_b32 s0, exec_lo
+; GFX12-NEXT: .LBB0_3: ; =>This Inner Loop Header: Depth=1
+; GFX12-NEXT: s_wait_loadcnt 0x1
+; GFX12-NEXT: v_readfirstlane_b32 s4, v0
+; GFX12-NEXT: v_readfirstlane_b32 s5, v1
+; GFX12-NEXT: v_readfirstlane_b32 s6, v2
+; GFX12-NEXT: v_readfirstlane_b32 s7, v3
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[0:1]
+; GFX12-NEXT: v_cmp_eq_u64_e64 s0, s[6:7], v[2:3]
+; GFX12-NEXT: s_wait_alu 0xfffe
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: s_and_b32 s0, vcc_lo, s0
+; GFX12-NEXT: s_wait_alu 0xfffe
+; GFX12-NEXT: s_and_saveexec_b32 s0, s0
+; GFX12-NEXT: s_wait_loadcnt 0x0
+; GFX12-NEXT: buffer_store_b32 v8, v4, s[4:7], null offen
+; GFX12-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
+; GFX12-NEXT: ; implicit-def: $vgpr8
+; GFX12-NEXT: ; implicit-def: $vgpr4
+; GFX12-NEXT: s_wait_alu 0xfffe
+; GFX12-NEXT: s_xor_b32 exec_lo, exec_lo, s0
+; GFX12-NEXT: s_cbranch_execnz .LBB0_3
+; GFX12-NEXT: ; %bb.4:
+; GFX12-NEXT: s_endpgm
+entry:
+ %val = load i32, ptr addrspace(7) %in, !amdgpu.last.use !{}
+ store i32 %val, ptr addrspace(7) %out
+ ret void
+}
+
+define amdgpu_kernel void @buffer_last_use_load_1(ptr addrspace(7) %in, ptr addrspace(7) %out) {
+; GFX6-LABEL: buffer_last_use_load_1:
+; GFX6: ; %bb.0: ; %entry
+; GFX6-NEXT: s_load_dwordx4 s[4:7], s[8:9], 0x0
+; GFX6-NEXT: s_load_dword s11, s[8:9], 0x10
+; GFX6-NEXT: s_mov_b32 s10, 0
+; GFX6-NEXT: s_add_u32 s0, s0, s15
+; GFX6-NEXT: s_mov_b32 s13, s10
+; GFX6-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6-NEXT: s_mov_b32 s12, s7
+; GFX6-NEXT: s_addc_u32 s1, s1, 0
+; GFX6-NEXT: s_or_b64 s[14:15], s[12:13], s[10:11]
+; GFX6-NEXT: s_mov_b32 s12, s5
+; GFX6-NEXT: s_mov_b32 s13, s6
+; GFX6-NEXT: v_lshl_add_u32 v0, v0, 2, s4
+; GFX6-NEXT: buffer_load_dword v0, v0, s[12:15], 0 offen
+; GFX6-NEXT: s_load_dword s11, s[8:9], 0x30
+; GFX6-NEXT: s_load_dwordx4 s[4:7], s[8:9], 0x20
+; GFX6-NEXT: s_mov_b32 s9, s10
+; GFX6-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6-NEXT: s_mov_b32 s8, s7
+; GFX6-NEXT: s_or_b64 s[10:11], s[8:9], s[10:11]
+; GFX6-NEXT: s_mov_b32 s8, s5
+; GFX6-NEXT: s_mov_b32 s9, s6
+; GFX6-NEXT: v_mov_b32_e32 v1, s4
+; GFX6-NEXT: s_waitcnt vmcnt(0)
+; GFX6-NEXT: buffer_store_dword v0, v1, s[8:11], 0 offen
+; GFX6-NEXT: s_endpgm
+;
+; GFX11-LABEL: buffer_last_use_load_1:
+; GFX11: ; %bb.0: ; %entry
+; GFX11-NEXT: s_clause 0x2
+; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX11-NEXT: s_load_b128 s[8:11], s[4:5], 0x20
+; GFX11-NEXT: s_load_b32 s6, s[4:5], 0x10
+; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX11-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-NEXT: v_dual_mov_b32 v4, s3 :: v_dual_mov_b32 v3, s2
+; GFX11-NEXT: v_dual_mov_b32 v2, s1 :: v_dual_mov_b32 v1, s0
+; GFX11-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX11-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX11-NEXT: scratch_store_b128 off, v[1:4], off offset:32
+; GFX11-NEXT: s_clause 0x1
+; GFX11-NEXT: scratch_load_b64 v[6:7], off, off offset:40
+; GFX11-NEXT: scratch_load_b32 v5, off, off offset:36
+; GFX11-NEXT: s_load_b32 s1, s[4:5], 0x30
+; GFX11-NEXT: scratch_store_b128 off, v[8:11], off
+; GFX11-NEXT: s_clause 0x1
+; GFX11-NEXT: scratch_load_b64 v[2:3], off, off offset:8
+; GFX11-NEXT: scratch_load_b32 v1, off, off offset:4
+; GFX11-NEXT: v_mov_b32_e32 v8, s6
+; GFX11-NEXT: v_lshl_add_u32 v9, v0, 2, s0
+; GFX11-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-NEXT: v_mov_b32_e32 v4, s1
+; GFX11-NEXT: s_mov_b32 s1, exec_lo
+; GFX11-NEXT: s_waitcnt vmcnt(0)
+; GFX11-NEXT: .LBB1_1: ; =>This Inner Loop Header: Depth=1
+; GFX11-NEXT: v_readfirstlane_b32 s4, v5
+; GFX11-NEXT: v_readfirstlane_b32 s5, v6
+; GFX11-NEXT: v_readfirstlane_b32 s6, v7
+; GFX11-NEXT: v_readfirstlane_b32 s7, v8
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[5:6]
+; GFX11-NEXT: v_cmp_eq_u64_e64 s0, s[6:7], v[7:8]
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: s_and_b32 s0, vcc_lo, s0
+; GFX11-NEXT: s_and_saveexec_b32 s0, s0
+; GFX11-NEXT: buffer_load_b32 v0, v9, s[4:7], 0 offen
+; GFX11-NEXT: ; implicit-def: $vgpr5_vgpr6_vgpr7_vgpr8
+; GFX11-NEXT: ; implicit-def: $vgpr9
+; GFX11-NEXT: s_xor_b32 exec_lo, exec_lo, s0
+; GFX11-NEXT: s_cbranch_execnz .LBB1_1
+; GFX11-NEXT: ; %bb.2:
+; GFX11-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-NEXT: v_mov_b32_e32 v5, s8
+; GFX11-NEXT: s_mov_b32 s0, exec_lo
+; GFX11-NEXT: .LBB1_3: ; =>This Inner Loop Header: Depth=1
+; GFX11-NEXT: v_readfirstlane_b32 s4, v1
+; GFX11-NEXT: v_readfirstlane_b32 s5, v2
+; GFX11-NEXT: v_readfirstlane_b32 s6, v3
+; GFX11-NEXT: v_readfirstlane_b32 s7, v4
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[1:2]
+; GFX11-NEXT: v_cmp_eq_u64_e64 s0, s[6:7], v[3:4]
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: s_and_b32 s0, vcc_lo, s0
+; GFX11-NEXT: s_and_saveexec_b32 s0, s0
+; GFX11-NEXT: s_waitcnt vmcnt(0)
+; GFX11-NEXT: buffer_store_b32 v0, v5, s[4:7], 0 offen
+; GFX11-NEXT: ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4
+; GFX11-NEXT: ; implicit-def: $vgpr0
+; GFX11-NEXT: ; implicit-def: $vgpr5
+; GFX11-NEXT: s_xor_b32 exec_lo, exec_lo, s0
+; GFX11-NEXT: s_cbranch_execnz .LBB1_3
+; GFX11-NEXT: ; %bb.4:
+; GFX11-NEXT: s_endpgm
+;
+; GFX12-LABEL: buffer_last_use_load_1:
+; GFX12: ; %bb.0: ; %entry
+; GFX12-NEXT: s_clause 0x2
+; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX12-NEXT: s_load_b128 s[8:11], s[4:5], 0x20
+; GFX12-NEXT: s_load_b32 s6, s[4:5], 0x10
+; GFX12-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_dual_mov_b32 v4, s3 :: v_dual_mov_b32 v3, s2
+; GFX12-NEXT: v_dual_mov_b32 v2, s1 :: v_dual_mov_b32 v1, s0
+; GFX12-NEXT: v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
+; GFX12-NEXT: v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
+; GFX12-NEXT: scratch_store_b128 off, v[1:4], off offset:32
+; GFX12-NEXT: s_clause 0x1
+; GFX12-NEXT: scratch_load_b64 v[6:7], off, off offset:40
+; GFX12-NEXT: scratch_load_b32 v5, off, off offset:36
+; GFX12-NEXT: s_load_b32 s1, s[4:5], 0x30
+; GFX12-NEXT: scratch_store_b128 off, v[8:11], off
+; GFX12-NEXT: s_clause 0x1
+; GFX12-NEXT: scratch_load_b64 v[2:3], off, off offset:8
+; GFX12-NEXT: scratch_load_b32 v1, off, off offset:4
+; GFX12-NEXT: v_mov_b32_e32 v8, s6
+; GFX12-NEXT: v_lshl_add_u32 v9, v0, 2, s0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_mov_b32_e32 v4, s1
+; GFX12-NEXT: s_mov_b32 s1, exec_lo
+; GFX12-NEXT: .LBB1_1: ; =>This Inner Loop Header: Depth=1
+; GFX12-NEXT: s_wait_loadcnt 0x2
+; GFX12-NEXT: v_readfirstlane_b32 s4, v5
+; GFX12-NEXT: v_readfirstlane_b32 s5, v6
+; GFX12-NEXT: v_readfirstlane_b32 s6, v7
+; GFX12-NEXT: v_readfirstlane_b32 s7, v8
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[5:6]
+; GFX12-NEXT: v_cmp_eq_u64_e64 s0, s[6:7], v[7:8]
+; GFX12-NEXT: s_wait_alu 0xfffe
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: s_and_b32 s0, vcc_lo, s0
+; GFX12-NEXT: s_wait_alu 0xfffe
+; GFX12-NEXT: s_and_saveexec_b32 s0, s0
+; GFX12-NEXT: s_wait_loadcnt 0x0
+; GFX12-NEXT: buffer_load_b32 v0, v9, s[4:7], null offen th:TH_LOAD_LU
+; GFX12-NEXT: ; implicit-def: $vgpr5_vgpr6_vgpr7_vgpr8
+; GFX12-NEXT: ; implicit-def: $vgpr9
+; GFX12-NEXT: s_wait_alu 0xfffe
+; GFX12-NEXT: s_xor_b32 exec_lo, exec_lo, s0
+; GFX12-NEXT: s_cbranch_execnz .LBB1_1
+; GFX12-NEXT: ; %bb.2:
+; GFX12-NEXT: s_mov_b32 exec_lo, s1
+; GFX12-NEXT: v_mov_b32_e32 v5, s8
+; GFX12-NEXT: s_mov_b32 s0, exec_lo
+; GFX12-NEXT: .LBB1_3: ; =>This Inner Loop Header: Depth=1
+; GFX12-NEXT: s_wait_loadcnt 0x1
+; GFX12-NEXT: v_readfirstlane_b32 s4, v1
+; GFX12-NEXT: v_readfirstlane_b32 s5, v2
+; GFX12-NEXT: v_readfirstlane_b32 s6, v3
+; GFX12-NEXT: v_readfirstlane_b32 s7, v4
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[1:2]
+; GFX12-NEXT: v_cmp_eq_u64_e64 s0, s[6:7], v[3:4]
+; GFX12-NEXT: s_wait_alu 0xfffe
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: s_and_b32 s0, vcc_lo, s0
+; GFX12-NEXT: s_wait_alu 0xfffe
+; GFX12-NEXT: s_and_saveexec_b32 s0, s0
+; GFX12-NEXT: s_wait_loadcnt 0x0
+; GFX12-NEXT: buffer_store_b32 v0, v5, s[4:7], null offen
+; GFX12-NEXT: ; implicit-def: $vgpr1_vgpr2_vgpr3_vgpr4
+; GFX12-NEXT: ; implicit-def: $vgpr0
+; GFX12-NEXT: ; implicit-def: $vgpr5
+; GFX12-NEXT: s_wait_alu 0xfffe
+; GFX12-NEXT: s_xor_b32 exec_lo, exec_lo, s0
+; GFX12-NEXT: s_cbranch_execnz .LBB1_3
+; GFX12-NEXT: ; %bb.4:
+; GFX12-NEXT: s_endpgm
+entry:
+ %tid = call i32 @llvm.amdgcn.workitem.id.x()
+ %val.gep = getelementptr inbounds i32, ptr addrspace(7) %in, i32 %tid
+ %val = load i32, ptr addrspace(7) %val.gep, align 4, !amdgpu.last.use !{}
+ store i32 %val, ptr addrspace(7) %out
+ ret void
+}
+
+define amdgpu_kernel void @buffer_last_use_and_volatile_load(ptr addrspace(7) %in, ptr addrspace(7) %out) {
+; GFX6-LABEL: buffer_last_use_and_volatile_load:
+; GFX6: ; %bb.0: ; %entry
+; GFX6-NEXT: s_load_dwordx4 s[4:7], s[8:9], 0x0
+; GFX6-NEXT: s_load_dword s11, s[8:9], 0x10
+; GFX6-NEXT: s_mov_b32 s10, 0
+; GFX6-NEXT: s_add_u32 s0, s0, s15
+; GFX6-NEXT: s_mov_b32 s15, s10
+; GFX6-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6-NEXT: s_mov_b32 s14, s7
+; GFX6-NEXT: s_addc_u32 s1, s1, 0
+; GFX6-NEXT: s_mov_b32 s12, s5
+; GFX6-NEXT: s_or_b64 s[14:15], s[14:15], s[10:11]
+; GFX6-NEXT: s_mov_b32 s13, s6
+; GFX6-NEXT: v_mov_b32_e32 v0, s4
+; GFX6-NEXT: buffer_load_dword v0, v0, s[12:15], 0 offen glc
+; GFX6-NEXT: s_load_dword s11, s[8:9], 0x30
+; GFX6-NEXT: s_load_dwordx4 s[4:7], s[8:9], 0x20
+; GFX6-NEXT: s_mov_b32 s9, s10
+; GFX6-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6-NEXT: s_mov_b32 s8, s7
+; GFX6-NEXT: s_or_b64 s[10:11], s[8:9], s[10:11]
+; GFX6-NEXT: s_mov_b32 s8, s5
+; GFX6-NEXT: s_mov_b32 s9, s6
+; GFX6-NEXT: v_mov_b32_e32 v1, s4
+; GFX6-NEXT: s_waitcnt vmcnt(0)
+; GFX6-NEXT: buffer_store_dword v0, v1, s[8:11], 0 offen
+; GFX6-NEXT: s_endpgm
+;
+; GFX11-LABEL: buffer_last_use_and_volatile_load:
+; GFX11: ; %bb.0: ; %entry
+; GFX11-NEXT: s_clause 0x2
+; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX11-NEXT: s_load_b128 s[8:11], s[4:5], 0x20
+; GFX11-NEXT: s_load_b32 s6, s[4:5], 0x10
+; GFX11-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-NEXT: v_dual_mov_b32 v7, s8 :: v_dual_mov_b32 v8, s9
+; GFX11-NEXT: v_dual_mov_b32 v9, s10 :: v_dual_mov_b32 v10, s11
+; GFX11-NEXT: scratch_store_b128 off, v[0:3], off offset:32
+; GFX11-NEXT: s_clause 0x1
+; GFX11-NEXT: scratch_load_b64 v[5:6], off, off offset:40
+; GFX11-NEXT: scratch_load_b32 v4, off, off offset:36
+; GFX11-NEXT: s_load_b32 s1, s[4:5], 0x30
+; GFX11-NEXT: scratch_store_b128 off, v[7:10], off
+; GFX11-NEXT: s_clause 0x1
+; GFX11-NEXT: scratch_load_b64 v[1:2], off, off offset:8
+; GFX11-NEXT: scratch_load_b32 v0, off, off offset:4
+; GFX11-NEXT: v_mov_b32_e32 v7, s6
+; GFX11-NEXT: v_mov_b32_e32 v9, s0
+; GFX11-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-NEXT: v_mov_b32_e32 v3, s1
+; GFX11-NEXT: s_mov_b32 s1, exec_lo
+; GFX11-NEXT: s_waitcnt vmcnt(0)
+; GFX11-NEXT: .LBB2_1: ; =>This Inner Loop Header: Depth=1
+; GFX11-NEXT: v_readfirstlane_b32 s4, v4
+; GFX11-NEXT: v_readfirstlane_b32 s5, v5
+; GFX11-NEXT: v_readfirstlane_b32 s6, v6
+; GFX11-NEXT: v_readfirstlane_b32 s7, v7
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[4:5]
+; GFX11-NEXT: v_cmp_eq_u64_e64 s0, s[6:7], v[6:7]
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: s_and_b32 s0, vcc_lo, s0
+; GFX11-NEXT: s_and_saveexec_b32 s0, s0
+; GFX11-NEXT: buffer_load_b32 v8, v9, s[4:7], 0 offen glc dlc
+; GFX11-NEXT: ; implicit-def: $vgpr4_vgpr5_vgpr6_vgpr7
+; GFX11-NEXT: ; implicit-def: $vgpr9
+; GFX11-NEXT: s_xor_b32 exec_lo, exec_lo, s0
+; GFX11-NEXT: s_cbranch_execnz .LBB2_1
+; GFX11-NEXT: ; %bb.2:
+; GFX11-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-NEXT: v_mov_b32_e32 v4, s8
+; GFX11-NEXT: s_mov_b32 s0, exec_lo
+; GFX11-NEXT: .LBB2_3: ; =>This Inner Loop Header: Depth=1
+; GFX11-NEXT: v_readfirstlane_b32 s4, v0
+; GFX11-NEXT: v_readfirstlane_b32 s5, v1
+; GFX11-NEXT: v_readfirstlane_b32 s6, v2
+; GFX11-NEXT: v_readfirstlane_b32 s7, v3
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[0:1]
+; GFX11-NEXT: v_cmp_eq_u64_e64 s0, s[6:7], v[2:3]
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: s_and_b32 s0, vcc_lo, s0
+; GFX11-NEXT: s_and_saveexec_b32 s0, s0
+; GFX11-NEXT: s_waitcnt vmcnt(0)
+; GFX11-NEXT: buffer_store_b32 v8, v4, s[4:7], 0 offen
+; GFX11-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
+; GFX11-NEXT: ; implicit-def: $vgpr8
+; GFX11-NEXT: ; implicit-def: $vgpr4
+; GFX11-NEXT: s_xor_b32 exec_lo, exec_lo, s0
+; GFX11-NEXT: s_cbranch_execnz .LBB2_3
+; GFX11-NEXT: ; %bb.4:
+; GFX11-NEXT: s_endpgm
+;
+; GFX12-LABEL: buffer_last_use_and_volatile_load:
+; GFX12: ; %bb.0: ; %entry
+; GFX12-NEXT: s_clause 0x2
+; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX12-NEXT: s_load_b128 s[8:11], s[4:5], 0x20
+; GFX12-NEXT: s_load_b32 s6, s[4:5], 0x10
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX12-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX12-NEXT: v_dual_mov_b32 v7, s8 :: v_dual_mov_b32 v8, s9
+; GFX12-NEXT: v_dual_mov_b32 v9, s10 :: v_dual_mov_b32 v10, s11
+; GFX12-NEXT: scratch_store_b128 off, v[0:3], off offset:32
+; GFX12-NEXT: s_clause 0x1
+; GFX12-NEXT: scratch_load_b64 v[5:6], off, off offset:40
+; GFX12-NEXT: scratch_load_b32 v4, off, off offset:36
+; GFX12-NEXT: s_load_b32 s1, s[4:5], 0x30
+; GFX12-NEXT: scratch_store_b128 off, v[7:10], off
+; GFX12-NEXT: s_clause 0x1
+; GFX12-NEXT: scratch_load_b64 v[1:2], off, off offset:8
+; GFX12-NEXT: scratch_load_b32 v0, off, off offset:4
+; GFX12-NEXT: v_mov_b32_e32 v7, s6
+; GFX12-NEXT: v_mov_b32_e32 v9, s0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_mov_b32_e32 v3, s1
+; GFX12-NEXT: s_mov_b32 s1, exec_lo
+; GFX12-NEXT: .LBB2_1: ; =>This Inner Loop Header: Depth=1
+; GFX12-NEXT: s_wait_loadcnt 0x2
+; GFX12-NEXT: v_readfirstlane_b32 s4, v4
+; GFX12-NEXT: v_readfirstlane_b32 s5, v5
+; GFX12-NEXT: v_readfirstlane_b32 s6, v6
+; GFX12-NEXT: v_readfirstlane_b32 s7, v7
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[4:5]
+; GFX12-NEXT: v_cmp_eq_u64_e64 s0, s[6:7], v[6:7]
+; GFX12-NEXT: s_wait_alu 0xfffe
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: s_and_b32 s0, vcc_lo, s0
+; GFX12-NEXT: s_wait_alu 0xfffe
+; GFX12-NEXT: s_and_saveexec_b32 s0, s0
+; GFX12-NEXT: s_wait_loadcnt 0x0
+; GFX12-NEXT: buffer_load_b32 v8, v9, s[4:7], null offen th:TH_LOAD_BYPASS scope:SCOPE_SYS
+; GFX12-NEXT: ; implicit-def: $vgpr4_vgpr5_vgpr6_vgpr7
+; GFX12-NEXT: ; implicit-def: $vgpr9
+; GFX12-NEXT: s_wait_alu 0xfffe
+; GFX12-NEXT: s_xor_b32 exec_lo, exec_lo, s0
+; GFX12-NEXT: s_cbranch_execnz .LBB2_1
+; GFX12-NEXT: ; %bb.2:
+; GFX12-NEXT: s_mov_b32 exec_lo, s1
+; GFX12-NEXT: v_mov_b32_e32 v4, s8
+; GFX12-NEXT: s_mov_b32 s0, exec_lo
+; GFX12-NEXT: .LBB2_3: ; =>This Inner Loop Header: Depth=1
+; GFX12-NEXT: s_wait_loadcnt 0x1
+; GFX12-NEXT: v_readfirstlane_b32 s4, v0
+; GFX12-NEXT: v_readfirstlane_b32 s5, v1
+; GFX12-NEXT: v_readfirstlane_b32 s6, v2
+; GFX12-NEXT: v_readfirstlane_b32 s7, v3
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[0:1]
+; GFX12-NEXT: v_cmp_eq_u64_e64 s0, s[6:7], v[2:3]
+; GFX12-NEXT: s_wait_alu 0xfffe
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: s_and_b32 s0, vcc_lo, s0
+; GFX12-NEXT: s_wait_alu 0xfffe
+; GFX12-NEXT: s_and_saveexec_b32 s0, s0
+; GFX12-NEXT: s_wait_loadcnt 0x0
+; GFX12-NEXT: buffer_store_b32 v8, v4, s[4:7], null offen
+; GFX12-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
+; GFX12-NEXT: ; implicit-def: $vgpr8
+; GFX12-NEXT: ; implicit-def: $vgpr4
+; GFX12-NEXT: s_wait_alu 0xfffe
+; GFX12-NEXT: s_xor_b32 exec_lo, exec_lo, s0
+; GFX12-NEXT: s_cbranch_execnz .LBB2_3
+; GFX12-NEXT: ; %bb.4:
+; GFX12-NEXT: s_endpgm
+entry:
+ %val = load volatile i32, ptr addrspace(7) %in, !amdgpu.last.use !{}
+ store i32 %val, ptr addrspace(7) %out
+ ret void
+}
+
+define amdgpu_kernel void @buffer_last_use_and_nontemporal_load(ptr addrspace(7) %in, ptr addrspace(7) %out) {
+; GFX6-LABEL: buffer_last_use_and_nontemporal_load:
+; GFX6: ; %bb.0: ; %entry
+; GFX6-NEXT: s_load_dwordx4 s[4:7], s[8:9], 0x0
+; GFX6-NEXT: s_load_dword s11, s[8:9], 0x10
+; GFX6-NEXT: s_mov_b32 s10, 0
+; GFX6-NEXT: s_add_u32 s0, s0, s15
+; GFX6-NEXT: s_mov_b32 s15, s10
+; GFX6-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6-NEXT: s_mov_b32 s14, s7
+; GFX6-NEXT: s_addc_u32 s1, s1, 0
+; GFX6-NEXT: s_mov_b32 s12, s5
+; GFX6-NEXT: s_or_b64 s[14:15], s[14:15], s[10:11]
+; GFX6-NEXT: s_mov_b32 s13, s6
+; GFX6-NEXT: v_mov_b32_e32 v0, s4
+; GFX6-NEXT: buffer_load_dword v0, v0, s[12:15], 0 offen glc slc
+; GFX6-NEXT: s_load_dword s11, s[8:9], 0x30
+; GFX6-NEXT: s_load_dwordx4 s[4:7], s[8:9], 0x20
+; GFX6-NEXT: s_mov_b32 s9, s10
+; GFX6-NEXT: s_waitcnt lgkmcnt(0)
+; GFX6-NEXT: s_mov_b32 s8, s7
+; GFX6-NEXT: s_or_b64 s[10:11], s[8:9], s[10:11]
+; GFX6-NEXT: s_mov_b32 s8, s5
+; GFX6-NEXT: s_mov_b32 s9, s6
+; GFX6-NEXT: v_mov_b32_e32 v1, s4
+; GFX6-NEXT: s_waitcnt vmcnt(0)
+; GFX6-NEXT: buffer_store_dword v0, v1, s[8:11], 0 offen
+; GFX6-NEXT: s_endpgm
+;
+; GFX11-LABEL: buffer_last_use_and_nontemporal_load:
+; GFX11: ; %bb.0: ; %entry
+; GFX11-NEXT: s_clause 0x2
+; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX11-NEXT: s_load_b128 s[8:11], s[4:5], 0x20
+; GFX11-NEXT: s_load_b32 s6, s[4:5], 0x10
+; GFX11-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX11-NEXT: v_dual_mov_b32 v7, s8 :: v_dual_mov_b32 v8, s9
+; GFX11-NEXT: v_dual_mov_b32 v9, s10 :: v_dual_mov_b32 v10, s11
+; GFX11-NEXT: scratch_store_b128 off, v[0:3], off offset:32
+; GFX11-NEXT: s_clause 0x1
+; GFX11-NEXT: scratch_load_b64 v[5:6], off, off offset:40
+; GFX11-NEXT: scratch_load_b32 v4, off, off offset:36
+; GFX11-NEXT: s_load_b32 s1, s[4:5], 0x30
+; GFX11-NEXT: scratch_store_b128 off, v[7:10], off
+; GFX11-NEXT: s_clause 0x1
+; GFX11-NEXT: scratch_load_b64 v[1:2], off, off offset:8
+; GFX11-NEXT: scratch_load_b32 v0, off, off offset:4
+; GFX11-NEXT: v_mov_b32_e32 v7, s6
+; GFX11-NEXT: v_mov_b32_e32 v9, s0
+; GFX11-NEXT: s_waitcnt lgkmcnt(0)
+; GFX11-NEXT: v_mov_b32_e32 v3, s1
+; GFX11-NEXT: s_mov_b32 s1, exec_lo
+; GFX11-NEXT: s_waitcnt vmcnt(0)
+; GFX11-NEXT: .LBB3_1: ; =>This Inner Loop Header: Depth=1
+; GFX11-NEXT: v_readfirstlane_b32 s4, v4
+; GFX11-NEXT: v_readfirstlane_b32 s5, v5
+; GFX11-NEXT: v_readfirstlane_b32 s6, v6
+; GFX11-NEXT: v_readfirstlane_b32 s7, v7
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[4:5]
+; GFX11-NEXT: v_cmp_eq_u64_e64 s0, s[6:7], v[6:7]
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: s_and_b32 s0, vcc_lo, s0
+; GFX11-NEXT: s_and_saveexec_b32 s0, s0
+; GFX11-NEXT: buffer_load_b32 v8, v9, s[4:7], 0 offen slc dlc
+; GFX11-NEXT: ; implicit-def: $vgpr4_vgpr5_vgpr6_vgpr7
+; GFX11-NEXT: ; implicit-def: $vgpr9
+; GFX11-NEXT: s_xor_b32 exec_lo, exec_lo, s0
+; GFX11-NEXT: s_cbranch_execnz .LBB3_1
+; GFX11-NEXT: ; %bb.2:
+; GFX11-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-NEXT: v_mov_b32_e32 v4, s8
+; GFX11-NEXT: s_mov_b32 s0, exec_lo
+; GFX11-NEXT: .LBB3_3: ; =>This Inner Loop Header: Depth=1
+; GFX11-NEXT: v_readfirstlane_b32 s4, v0
+; GFX11-NEXT: v_readfirstlane_b32 s5, v1
+; GFX11-NEXT: v_readfirstlane_b32 s6, v2
+; GFX11-NEXT: v_readfirstlane_b32 s7, v3
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[0:1]
+; GFX11-NEXT: v_cmp_eq_u64_e64 s0, s[6:7], v[2:3]
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
+; GFX11-NEXT: s_and_b32 s0, vcc_lo, s0
+; GFX11-NEXT: s_and_saveexec_b32 s0, s0
+; GFX11-NEXT: s_waitcnt vmcnt(0)
+; GFX11-NEXT: buffer_store_b32 v8, v4, s[4:7], 0 offen
+; GFX11-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
+; GFX11-NEXT: ; implicit-def: $vgpr8
+; GFX11-NEXT: ; implicit-def: $vgpr4
+; GFX11-NEXT: s_xor_b32 exec_lo, exec_lo, s0
+; GFX11-NEXT: s_cbranch_execnz .LBB3_3
+; GFX11-NEXT: ; %bb.4:
+; GFX11-NEXT: s_endpgm
+;
+; GFX12-LABEL: buffer_last_use_and_nontemporal_load:
+; GFX12: ; %bb.0: ; %entry
+; GFX12-NEXT: s_clause 0x2
+; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x0
+; GFX12-NEXT: s_load_b128 s[8:11], s[4:5], 0x20
+; GFX12-NEXT: s_load_b32 s6, s[4:5], 0x10
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
+; GFX12-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+; GFX12-NEXT: v_dual_mov_b32 v7, s8 :: v_dual_mov_b32 v8, s9
+; GFX12-NEXT: v_dual_mov_b32 v9, s10 :: v_dual_mov_b32 v10, s11
+; GFX12-NEXT: scratch_store_b128 off, v[0:3], off offset:32
+; GFX12-NEXT: s_clause 0x1
+; GFX12-NEXT: scratch_load_b64 v[5:6], off, off offset:40
+; GFX12-NEXT: scratch_load_b32 v4, off, off offset:36
+; GFX12-NEXT: s_load_b32 s1, s[4:5], 0x30
+; GFX12-NEXT: scratch_store_b128 off, v[7:10], off
+; GFX12-NEXT: s_clause 0x1
+; GFX12-NEXT: scratch_load_b64 v[1:2], off, off offset:8
+; GFX12-NEXT: scratch_load_b32 v0, off, off offset:4
+; GFX12-NEXT: v_mov_b32_e32 v7, s6
+; GFX12-NEXT: v_mov_b32_e32 v9, s0
+; GFX12-NEXT: s_wait_kmcnt 0x0
+; GFX12-NEXT: v_mov_b32_e32 v3, s1
+; GFX12-NEXT: s_mov_b32 s1, exec_lo
+; GFX12-NEXT: .LBB3_1: ; =>This Inner Loop Header: Depth=1
+; GFX12-NEXT: s_wait_loadcnt 0x2
+; GFX12-NEXT: v_readfirstlane_b32 s4, v4
+; GFX12-NEXT: v_readfirstlane_b32 s5, v5
+; GFX12-NEXT: v_readfirstlane_b32 s6, v6
+; GFX12-NEXT: v_readfirstlane_b32 s7, v7
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[4:5]
+; GFX12-NEXT: v_cmp_eq_u64_e64 s0, s[6:7], v[6:7]
+; GFX12-NEXT: s_wait_alu 0xfffe
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: s_and_b32 s0, vcc_lo, s0
+; GFX12-NEXT: s_wait_alu 0xfffe
+; GFX12-NEXT: s_and_saveexec_b32 s0, s0
+; GFX12-NEXT: s_wait_loadcnt 0x0
+; GFX12-NEXT: buffer_load_b32 v8, v9, s[4:7], null offen th:TH_LOAD_LU
+; GFX12-NEXT: ; implicit-def: $vgpr4_vgpr5_vgpr6_vgpr7
+; GFX12-NEXT: ; implicit-def: $vgpr9
+; GFX12-NEXT: s_wait_alu 0xfffe
+; GFX12-NEXT: s_xor_b32 exec_lo, exec_lo, s0
+; GFX12-NEXT: s_cbranch_execnz .LBB3_1
+; GFX12-NEXT: ; %bb.2:
+; GFX12-NEXT: s_mov_b32 exec_lo, s1
+; GFX12-NEXT: v_mov_b32_e32 v4, s8
+; GFX12-NEXT: s_mov_b32 s0, exec_lo
+; GFX12-NEXT: .LBB3_3: ; =>This Inner Loop Header: Depth=1
+; GFX12-NEXT: s_wait_loadcnt 0x1
+; GFX12-NEXT: v_readfirstlane_b32 s4, v0
+; GFX12-NEXT: v_readfirstlane_b32 s5, v1
+; GFX12-NEXT: v_readfirstlane_b32 s6, v2
+; GFX12-NEXT: v_readfirstlane_b32 s7, v3
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX12-NEXT: v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[0:1]
+; GFX12-NEXT: v_cmp_eq_u64_e64 s0, s[6:7], v[2:3]
+; GFX12-NEXT: s_wait_alu 0xfffe
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX12-NEXT: s_and_b32 s0, vcc_lo, s0
+; GFX12-NEXT: s_wait_alu 0xfffe
+; GFX12-NEXT: s_and_saveexec_b32 s0, s0
+; GFX12-NEXT: s_wait_loadcnt 0x0
+; GFX12-NEXT: buffer_store_b32 v8, v4, s[4:7], null offen
+; GFX12-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
+; GFX12-NEXT: ; implicit-def: $vgpr8
+; GFX12-NEXT: ; implicit-def: $vgpr4
+; GFX12-NEXT: s_wait_alu 0xfffe
+; GFX12-NEXT: s_xor_b32 exec_lo, exec_lo, s0
+; GFX12-NEXT: s_cbranch_execnz .LBB3_3
+; GFX12-NEXT: ; %bb.4:
+; GFX12-NEXT: s_endpgm
+entry:
+ %val = load i32, ptr addrspace(7) %in, !amdgpu.last.use !{}, !nontemporal !0
+ store i32 %val, ptr addrspace(7) %out
+ ret void
+}
+
+!0 = !{i32 1}
+declare i32 @llvm.amdgcn.workitem.id.x()
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