[lldb] [llvm] [LLDB][Process] Add LSX and LASX register definitions and operations on the LoongArch64 (PR #120664)
via llvm-commits
llvm-commits at lists.llvm.org
Fri Dec 27 01:21:51 PST 2024
https://github.com/wangleiat updated https://github.com/llvm/llvm-project/pull/120664
>From 7e56f86ec79865de0c2bc49ffa3f9f2b17a6f36f Mon Sep 17 00:00:00 2001
From: wanglei <wanglei at loongson.cn>
Date: Fri, 20 Dec 2024 09:10:10 +0800
Subject: [PATCH 1/3] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20in?=
=?UTF-8?q?itial=20version?=
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Created using spr 1.3.5-bogner
---
...NativeRegisterContextLinux_loongarch64.cpp | 168 ++++++++++++++++++
.../NativeRegisterContextLinux_loongarch64.h | 21 ++-
.../RegisterContextPOSIX_loongarch64.cpp | 10 ++
.../RegisterContextPOSIX_loongarch64.h | 8 +
.../Utility/RegisterInfoPOSIX_loongarch64.cpp | 63 ++++++-
.../Utility/RegisterInfoPOSIX_loongarch64.h | 12 ++
.../Utility/RegisterInfos_loongarch64.h | 89 ++++++++++
.../Utility/lldb-loongarch-register-enums.h | 70 ++++++++
.../RegisterContextPOSIXCore_loongarch64.cpp | 14 ++
.../RegisterContextPOSIXCore_loongarch64.h | 8 +
.../Utility/LoongArch_DWARF_Registers.h | 66 +++++++
11 files changed, 525 insertions(+), 4 deletions(-)
diff --git a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp
index 9ffc8ada920cb8..2eeea46f7f6836 100644
--- a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp
+++ b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp
@@ -27,6 +27,14 @@
// struct iovec definition
#include <sys/uio.h>
+#ifndef NT_LARCH_LSX
+#define NT_LARCH_LSX 0xa02 /* LoongArch SIMD eXtension registers */
+#endif
+
+#ifndef NT_LARCH_LASX
+#define NT_LARCH_LASX 0xa03 /* LoongArch Advanced SIMD eXtension registers */
+#endif
+
#define REG_CONTEXT_SIZE (GetGPRSize() + GetFPRSize())
using namespace lldb;
@@ -62,6 +70,8 @@ NativeRegisterContextLinux_loongarch64::NativeRegisterContextLinux_loongarch64(
NativeRegisterContextLinux(native_thread) {
::memset(&m_fpr, 0, sizeof(m_fpr));
::memset(&m_gpr, 0, sizeof(m_gpr));
+ ::memset(&m_lsx, 0, sizeof(m_lsx));
+ ::memset(&m_lasx, 0, sizeof(m_lasx));
::memset(&m_hwp_regs, 0, sizeof(m_hwp_regs));
::memset(&m_hbp_regs, 0, sizeof(m_hbp_regs));
@@ -75,6 +85,8 @@ NativeRegisterContextLinux_loongarch64::NativeRegisterContextLinux_loongarch64(
m_gpr_is_valid = false;
m_fpu_is_valid = false;
+ m_lsx_is_valid = false;
+ m_lasx_is_valid = false;
}
const RegisterInfoPOSIX_loongarch64 &
@@ -135,6 +147,22 @@ Status NativeRegisterContextLinux_loongarch64::ReadRegister(
offset = CalculateFprOffset(reg_info);
assert(offset < GetFPRSize());
src = (uint8_t *)GetFPRBuffer() + offset;
+ } else if (IsLSX(reg)) {
+ error = ReadLSX();
+ if (error.Fail())
+ return error;
+
+ offset = CalculateLsxOffset(reg_info);
+ assert(offset < sizeof(m_lsx));
+ src = (uint8_t *)&m_lsx + offset;
+ } else if (IsLASX(reg)) {
+ error = ReadLASX();
+ if (error.Fail())
+ return error;
+
+ offset = CalculateLasxOffset(reg_info);
+ assert(offset < sizeof(m_lasx));
+ src = (uint8_t *)&m_lasx + offset;
} else
return Status::FromErrorString(
"failed - register wasn't recognized to be a GPR or an FPR, "
@@ -184,6 +212,28 @@ Status NativeRegisterContextLinux_loongarch64::WriteRegister(
::memcpy(dst, reg_value.GetBytes(), reg_info->byte_size);
return WriteFPR();
+ } else if (IsLSX(reg)) {
+ error = ReadLSX();
+ if (error.Fail())
+ return error;
+
+ offset = CalculateLsxOffset(reg_info);
+ assert(offset < sizeof(m_lsx));
+ dst = (uint8_t *)&m_lsx + offset;
+ ::memcpy(dst, reg_value.GetBytes(), reg_info->byte_size);
+
+ return WriteLSX();
+ } else if (IsLASX(reg)) {
+ error = ReadLASX();
+ if (error.Fail())
+ return error;
+
+ offset = CalculateLasxOffset(reg_info);
+ assert(offset < sizeof(m_lasx));
+ dst = (uint8_t *)&m_lasx + offset;
+ ::memcpy(dst, reg_value.GetBytes(), reg_info->byte_size);
+
+ return WriteLASX();
}
return Status::FromErrorString("Failed to write register value");
@@ -203,10 +253,22 @@ Status NativeRegisterContextLinux_loongarch64::ReadAllRegisterValues(
if (error.Fail())
return error;
+ error = ReadLSX();
+ if (error.Fail())
+ return error;
+
+ error = ReadLASX();
+ if (error.Fail())
+ return error;
+
uint8_t *dst = data_sp->GetBytes();
::memcpy(dst, GetGPRBuffer(), GetGPRSize());
dst += GetGPRSize();
::memcpy(dst, GetFPRBuffer(), GetFPRSize());
+ dst += GetFPRSize();
+ ::memcpy(dst, &m_lsx, sizeof(m_lsx));
+ dst += sizeof(m_lsx);
+ ::memcpy(dst, &m_lasx, sizeof(m_lasx));
return error;
}
@@ -252,6 +314,20 @@ Status NativeRegisterContextLinux_loongarch64::WriteAllRegisterValues(
if (error.Fail())
return error;
+ src += GetFPRSize();
+ ::memcpy(&m_lsx, src, sizeof(m_lsx));
+
+ error = WriteLSX();
+ if (error.Fail())
+ return error;
+
+ src += sizeof(m_lsx);
+ ::memcpy(&m_lasx, src, sizeof(m_lasx));
+
+ error = WriteLASX();
+ if (error.Fail())
+ return error;
+
return error;
}
@@ -265,6 +341,16 @@ bool NativeRegisterContextLinux_loongarch64::IsFPR(unsigned reg) const {
RegisterInfoPOSIX_loongarch64::FPRegSet;
}
+bool NativeRegisterContextLinux_loongarch64::IsLSX(unsigned reg) const {
+ return GetRegisterInfo().GetRegisterSetFromRegisterIndex(reg) ==
+ RegisterInfoPOSIX_loongarch64::LSXRegSet;
+}
+
+bool NativeRegisterContextLinux_loongarch64::IsLASX(unsigned reg) const {
+ return GetRegisterInfo().GetRegisterSetFromRegisterIndex(reg) ==
+ RegisterInfoPOSIX_loongarch64::LASXRegSet;
+}
+
Status NativeRegisterContextLinux_loongarch64::ReadGPR() {
Status error;
@@ -325,13 +411,85 @@ Status NativeRegisterContextLinux_loongarch64::WriteFPR() {
ioVec.iov_len = GetFPRSize();
m_fpu_is_valid = false;
+ m_lsx_is_valid = false;
+ m_lasx_is_valid = false;
return WriteRegisterSet(&ioVec, GetFPRSize(), NT_FPREGSET);
}
+Status NativeRegisterContextLinux_loongarch64::ReadLSX() {
+ Status error;
+
+ if (m_lsx_is_valid)
+ return error;
+
+ struct iovec ioVec;
+ ioVec.iov_base = &m_lsx;
+ ioVec.iov_len = sizeof(m_lsx);
+
+ error = ReadRegisterSet(&ioVec, sizeof(m_lsx), NT_LARCH_LSX);
+
+ if (error.Success())
+ m_lsx_is_valid = true;
+
+ return error;
+}
+
+Status NativeRegisterContextLinux_loongarch64::WriteLSX() {
+ Status error = ReadLSX();
+ if (error.Fail())
+ return error;
+
+ struct iovec ioVec;
+ ioVec.iov_base = &m_lsx;
+ ioVec.iov_len = sizeof(m_lsx);
+
+ m_fpu_is_valid = false;
+ m_lsx_is_valid = false;
+ m_lasx_is_valid = false;
+
+ return WriteRegisterSet(&ioVec, sizeof(m_lsx), NT_LARCH_LSX);
+}
+
+Status NativeRegisterContextLinux_loongarch64::ReadLASX() {
+ Status error;
+
+ if (m_lasx_is_valid)
+ return error;
+
+ struct iovec ioVec;
+ ioVec.iov_base = &m_lasx;
+ ioVec.iov_len = sizeof(m_lasx);
+
+ error = ReadRegisterSet(&ioVec, sizeof(m_lasx), NT_LARCH_LASX);
+
+ if (error.Success())
+ m_lasx_is_valid = true;
+
+ return error;
+}
+
+Status NativeRegisterContextLinux_loongarch64::WriteLASX() {
+ Status error = ReadLASX();
+ if (error.Fail())
+ return error;
+
+ struct iovec ioVec;
+ ioVec.iov_base = &m_lasx;
+ ioVec.iov_len = sizeof(m_lasx);
+
+ m_fpu_is_valid = false;
+ m_lsx_is_valid = false;
+ m_lasx_is_valid = false;
+
+ return WriteRegisterSet(&ioVec, sizeof(m_lsx), NT_LARCH_LASX);
+}
+
void NativeRegisterContextLinux_loongarch64::InvalidateAllRegisters() {
m_gpr_is_valid = false;
m_fpu_is_valid = false;
+ m_lsx_is_valid = false;
+ m_lasx_is_valid = false;
}
uint32_t NativeRegisterContextLinux_loongarch64::CalculateFprOffset(
@@ -339,6 +497,16 @@ uint32_t NativeRegisterContextLinux_loongarch64::CalculateFprOffset(
return reg_info->byte_offset - GetGPRSize();
}
+uint32_t NativeRegisterContextLinux_loongarch64::CalculateLsxOffset(
+ const RegisterInfo *reg_info) const {
+ return reg_info->byte_offset - GetGPRSize() - sizeof(m_fpr);
+}
+
+uint32_t NativeRegisterContextLinux_loongarch64::CalculateLasxOffset(
+ const RegisterInfo *reg_info) const {
+ return reg_info->byte_offset - GetGPRSize() - sizeof(m_fpr) - sizeof(m_lsx);
+}
+
std::vector<uint32_t>
NativeRegisterContextLinux_loongarch64::GetExpeditedRegisters(
ExpeditedRegs expType) const {
diff --git a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.h b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.h
index 633b26fa970de1..2b2bb7d29d82f1 100644
--- a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.h
+++ b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.h
@@ -62,6 +62,14 @@ class NativeRegisterContextLinux_loongarch64
Status WriteFPR() override;
+ Status ReadLSX();
+
+ Status WriteLSX();
+
+ Status ReadLASX();
+
+ Status WriteLASX();
+
void *GetGPRBuffer() override { return &m_gpr; }
void *GetFPRBuffer() override { return &m_fpr; }
@@ -73,18 +81,29 @@ class NativeRegisterContextLinux_loongarch64
private:
bool m_gpr_is_valid;
bool m_fpu_is_valid;
+ bool m_lsx_is_valid;
+ bool m_lasx_is_valid;
bool m_refresh_hwdebug_info;
RegisterInfoPOSIX_loongarch64::GPR m_gpr;
-
RegisterInfoPOSIX_loongarch64::FPR m_fpr;
+ RegisterInfoPOSIX_loongarch64::LSX m_lsx;
+ RegisterInfoPOSIX_loongarch64::LASX m_lasx;
bool IsGPR(unsigned reg) const;
bool IsFPR(unsigned reg) const;
+ bool IsLSX(unsigned reg) const;
+
+ bool IsLASX(unsigned reg) const;
+
uint32_t CalculateFprOffset(const RegisterInfo *reg_info) const;
+ uint32_t CalculateLsxOffset(const RegisterInfo *reg_info) const;
+
+ uint32_t CalculateLasxOffset(const RegisterInfo *reg_info) const;
+
const RegisterInfoPOSIX_loongarch64 &GetRegisterInfo() const;
llvm::Error ReadHardwareDebugInfo() override;
diff --git a/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.cpp b/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.cpp
index 49f371fb949b7b..3306fb20dae9b8 100644
--- a/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.cpp
+++ b/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.cpp
@@ -80,3 +80,13 @@ bool RegisterContextPOSIX_loongarch64::IsFPR(unsigned int reg) {
return m_register_info_up->GetRegisterSetFromRegisterIndex(reg) ==
RegisterInfoPOSIX_loongarch64::FPRegSet;
}
+
+bool RegisterContextPOSIX_loongarch64::IsLSX(unsigned int reg) {
+ return m_register_info_up->GetRegisterSetFromRegisterIndex(reg) ==
+ RegisterInfoPOSIX_loongarch64::LSXRegSet;
+}
+
+bool RegisterContextPOSIX_loongarch64::IsLASX(unsigned int reg) {
+ return m_register_info_up->GetRegisterSetFromRegisterIndex(reg) ==
+ RegisterInfoPOSIX_loongarch64::LASXRegSet;
+}
diff --git a/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.h b/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.h
index 95f93bb41f015d..8804eb79f8d74d 100644
--- a/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.h
+++ b/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.h
@@ -50,14 +50,22 @@ class RegisterContextPOSIX_loongarch64 : public lldb_private::RegisterContext {
bool IsFPR(unsigned reg);
+ bool IsLSX(unsigned reg);
+
+ bool IsLASX(unsigned reg);
+
size_t GetFPRSize() { return sizeof(RegisterInfoPOSIX_loongarch64::FPR); }
uint32_t GetRegNumFCSR() const { return fpr_fcsr_loongarch; }
virtual bool ReadGPR() = 0;
virtual bool ReadFPR() = 0;
+ virtual bool ReadLSX() = 0;
+ virtual bool ReadLASX() = 0;
virtual bool WriteGPR() = 0;
virtual bool WriteFPR() = 0;
+ virtual bool WriteLSX() = 0;
+ virtual bool WriteLASX() = 0;
};
#endif // LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERCONTEXTPOSIX_LOONGARCH64_H
diff --git a/lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.cpp b/lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.cpp
index 6c723afe4b6948..61cd40ddcfc841 100644
--- a/lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.cpp
+++ b/lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.cpp
@@ -19,10 +19,19 @@
#define FPR_OFFSET(idx) ((idx)*8 + sizeof(RegisterInfoPOSIX_loongarch64::GPR))
#define FCC_OFFSET(idx) ((idx)*1 + 32 * 8 + sizeof(RegisterInfoPOSIX_loongarch64::GPR))
#define FCSR_OFFSET (8 * 1 + 32 * 8 + sizeof(RegisterInfoPOSIX_loongarch64::GPR))
+#define LSX_OFFSET(idx) \
+ ((idx) * 16 + sizeof(RegisterInfoPOSIX_loongarch64::GPR) + \
+ sizeof(RegisterInfoPOSIX_loongarch64::FPR))
+#define LASX_OFFSET(idx) \
+ ((idx) * 32 + sizeof(RegisterInfoPOSIX_loongarch64::GPR) + \
+ sizeof(RegisterInfoPOSIX_loongarch64::FPR) + \
+ sizeof(RegisterInfoPOSIX_loongarch64::LSX))
#define REG_CONTEXT_SIZE \
(sizeof(RegisterInfoPOSIX_loongarch64::GPR) + \
- sizeof(RegisterInfoPOSIX_loongarch64::FPR))
+ sizeof(RegisterInfoPOSIX_loongarch64::FPR) + \
+ sizeof(RegisterInfoPOSIX_loongarch64::LSX) + \
+ sizeof(RegisterInfoPOSIX_loongarch64::LASX))
#define DECLARE_REGISTER_INFOS_LOONGARCH64_STRUCT
#include "RegisterInfos_loongarch64.h"
@@ -56,7 +65,9 @@ uint32_t RegisterInfoPOSIX_loongarch64::GetRegisterInfoCount(
enum {
k_num_gpr_registers = gpr_last_loongarch - gpr_first_loongarch + 1,
k_num_fpr_registers = fpr_last_loongarch - fpr_first_loongarch + 1,
- k_num_register_sets = 2
+ k_num_lsx_registers = lsx_last_loongarch - lsx_first_loongarch + 1,
+ k_num_lasx_registers = lasx_last_loongarch - lasx_first_loongarch + 1,
+ k_num_register_sets = 4
};
// LoongArch64 general purpose registers.
@@ -105,13 +116,55 @@ static_assert(((sizeof g_fpr_regnums_loongarch64 /
1) == k_num_fpr_registers,
"g_fpr_regnums_loongarch64 has wrong number of register infos");
+// LoongArch64 lsx vector registers.
+static const uint32_t g_lsx_regnums_loongarch64[] = {
+ lsx_vr0_loongarch, lsx_vr1_loongarch, lsx_vr2_loongarch,
+ lsx_vr3_loongarch, lsx_vr4_loongarch, lsx_vr5_loongarch,
+ lsx_vr6_loongarch, lsx_vr7_loongarch, lsx_vr8_loongarch,
+ lsx_vr9_loongarch, lsx_vr10_loongarch, lsx_vr11_loongarch,
+ lsx_vr12_loongarch, lsx_vr13_loongarch, lsx_vr14_loongarch,
+ lsx_vr15_loongarch, lsx_vr16_loongarch, lsx_vr17_loongarch,
+ lsx_vr18_loongarch, lsx_vr19_loongarch, lsx_vr20_loongarch,
+ lsx_vr21_loongarch, lsx_vr22_loongarch, lsx_vr23_loongarch,
+ lsx_vr24_loongarch, lsx_vr25_loongarch, lsx_vr26_loongarch,
+ lsx_vr27_loongarch, lsx_vr28_loongarch, lsx_vr29_loongarch,
+ lsx_vr30_loongarch, lsx_vr31_loongarch, LLDB_INVALID_REGNUM};
+
+static_assert(((sizeof g_lsx_regnums_loongarch64 /
+ sizeof g_lsx_regnums_loongarch64[0]) -
+ 1) == k_num_lsx_registers,
+ "g_lsx_regnums_loongarch64 has wrong number of register infos");
+
+// LoongArch64 lasx vector registers.
+static const uint32_t g_lasx_regnums_loongarch64[] = {
+ lasx_xr0_loongarch, lasx_xr1_loongarch, lasx_xr2_loongarch,
+ lasx_xr3_loongarch, lasx_xr4_loongarch, lasx_xr5_loongarch,
+ lasx_xr6_loongarch, lasx_xr7_loongarch, lasx_xr8_loongarch,
+ lasx_xr9_loongarch, lasx_xr10_loongarch, lasx_xr11_loongarch,
+ lasx_xr12_loongarch, lasx_xr13_loongarch, lasx_xr14_loongarch,
+ lasx_xr15_loongarch, lasx_xr16_loongarch, lasx_xr17_loongarch,
+ lasx_xr18_loongarch, lasx_xr19_loongarch, lasx_xr20_loongarch,
+ lasx_xr21_loongarch, lasx_xr22_loongarch, lasx_xr23_loongarch,
+ lasx_xr24_loongarch, lasx_xr25_loongarch, lasx_xr26_loongarch,
+ lasx_xr27_loongarch, lasx_xr28_loongarch, lasx_xr29_loongarch,
+ lasx_xr30_loongarch, lasx_xr31_loongarch, LLDB_INVALID_REGNUM};
+
+static_assert(((sizeof g_lasx_regnums_loongarch64 /
+ sizeof g_lasx_regnums_loongarch64[0]) -
+ 1) == k_num_lasx_registers,
+ "g_lasx_regnums_loongarch64 has wrong number of register infos");
+
// Register sets for LoongArch64.
static const lldb_private::RegisterSet
g_reg_sets_loongarch64[k_num_register_sets] = {
{"General Purpose Registers", "gpr", k_num_gpr_registers,
g_gpr_regnums_loongarch64},
{"Floating Point Registers", "fpr", k_num_fpr_registers,
- g_fpr_regnums_loongarch64}};
+ g_fpr_regnums_loongarch64},
+ {"LSX Vector Registers", "lsx", k_num_lsx_registers,
+ g_lsx_regnums_loongarch64},
+ {"LASX Vector Registers", "lasx", k_num_lasx_registers,
+ g_lasx_regnums_loongarch64}};
RegisterInfoPOSIX_loongarch64::RegisterInfoPOSIX_loongarch64(
const lldb_private::ArchSpec &target_arch, lldb_private::Flags flags)
@@ -147,6 +200,10 @@ size_t RegisterInfoPOSIX_loongarch64::GetRegisterSetFromRegisterIndex(
return GPRegSet;
if (reg_index >= fpr_first_loongarch && reg_index <= fpr_last_loongarch)
return FPRegSet;
+ if (reg_index >= lsx_first_loongarch && reg_index <= lsx_last_loongarch)
+ return LSXRegSet;
+ if (reg_index >= lasx_first_loongarch && reg_index <= lasx_last_loongarch)
+ return LASXRegSet;
return LLDB_INVALID_REGNUM;
}
diff --git a/lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.h b/lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.h
index a3338acbbc97bd..0ff08bb8c0e92a 100644
--- a/lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.h
+++ b/lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.h
@@ -26,6 +26,8 @@ class RegisterInfoPOSIX_loongarch64
enum RegSetKind {
GPRegSet,
FPRegSet,
+ LSXRegSet,
+ LASXRegSet,
};
struct GPR {
@@ -43,6 +45,16 @@ class RegisterInfoPOSIX_loongarch64
uint32_t fcsr;
};
+ /* 32 registers, 128 bits width per register. */
+ struct LSX {
+ uint64_t vr[32 * 2];
+ };
+
+ /* 32 registers, 256 bits width per register. */
+ struct LASX {
+ uint64_t xr[32 * 4];
+ };
+
RegisterInfoPOSIX_loongarch64(const lldb_private::ArchSpec &target_arch,
lldb_private::Flags flags);
diff --git a/lldb/source/Plugins/Process/Utility/RegisterInfos_loongarch64.h b/lldb/source/Plugins/Process/Utility/RegisterInfos_loongarch64.h
index 3fb1e6a5fbef2e..ff8fe5990ce118 100644
--- a/lldb/source/Plugins/Process/Utility/RegisterInfos_loongarch64.h
+++ b/lldb/source/Plugins/Process/Utility/RegisterInfos_loongarch64.h
@@ -25,6 +25,14 @@
#error FPR_OFFSET must be defined before including this header file
#endif
+#ifndef LSX_OFFSET
+#error LSX_OFFSET must be defined before including this header file
+#endif
+
+#ifndef LASX_OFFSET
+#error LASX_OFFSET must be defined before including this header file
+#endif
+
using namespace loongarch_dwarf;
// clang-format off
@@ -74,6 +82,21 @@ using namespace loongarch_dwarf;
FPR64_KIND(fpr_##reg, generic_kind), nullptr, nullptr, nullptr, \
}
+#define DEFINE_LSX(reg, generic_kind) \
+ { \
+ #reg, nullptr, 16, LSX_OFFSET(lsx_##reg##_loongarch - lsx_first_loongarch),\
+ lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, \
+ KIND_HELPER(lsx_##reg, generic_kind), nullptr, nullptr, nullptr, \
+ }
+
+#define DEFINE_LASX(reg, generic_kind) \
+ { \
+ #reg, nullptr, 32, \
+ LASX_OFFSET(lasx_##reg##_loongarch - lasx_first_loongarch), \
+ lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, \
+ KIND_HELPER(lasx_##reg, generic_kind), nullptr, nullptr, nullptr, \
+ }
+
// clang-format on
static lldb_private::RegisterInfo g_register_infos_loongarch64[] = {
@@ -166,6 +189,72 @@ static lldb_private::RegisterInfo g_register_infos_loongarch64[] = {
DEFINE_FCC(fcc6, LLDB_INVALID_REGNUM),
DEFINE_FCC(fcc7, LLDB_INVALID_REGNUM),
DEFINE_FCSR(fcsr, LLDB_INVALID_REGNUM),
+
+ DEFINE_LSX(vr0, LLDB_INVALID_REGNUM),
+ DEFINE_LSX(vr1, LLDB_INVALID_REGNUM),
+ DEFINE_LSX(vr2, LLDB_INVALID_REGNUM),
+ DEFINE_LSX(vr3, LLDB_INVALID_REGNUM),
+ DEFINE_LSX(vr4, LLDB_INVALID_REGNUM),
+ DEFINE_LSX(vr5, LLDB_INVALID_REGNUM),
+ DEFINE_LSX(vr6, LLDB_INVALID_REGNUM),
+ DEFINE_LSX(vr7, LLDB_INVALID_REGNUM),
+ DEFINE_LSX(vr8, LLDB_INVALID_REGNUM),
+ DEFINE_LSX(vr9, LLDB_INVALID_REGNUM),
+ DEFINE_LSX(vr10, LLDB_INVALID_REGNUM),
+ DEFINE_LSX(vr11, LLDB_INVALID_REGNUM),
+ DEFINE_LSX(vr12, LLDB_INVALID_REGNUM),
+ DEFINE_LSX(vr13, LLDB_INVALID_REGNUM),
+ DEFINE_LSX(vr14, LLDB_INVALID_REGNUM),
+ DEFINE_LSX(vr15, LLDB_INVALID_REGNUM),
+ DEFINE_LSX(vr16, LLDB_INVALID_REGNUM),
+ DEFINE_LSX(vr17, LLDB_INVALID_REGNUM),
+ DEFINE_LSX(vr18, LLDB_INVALID_REGNUM),
+ DEFINE_LSX(vr19, LLDB_INVALID_REGNUM),
+ DEFINE_LSX(vr20, LLDB_INVALID_REGNUM),
+ DEFINE_LSX(vr21, LLDB_INVALID_REGNUM),
+ DEFINE_LSX(vr22, LLDB_INVALID_REGNUM),
+ DEFINE_LSX(vr23, LLDB_INVALID_REGNUM),
+ DEFINE_LSX(vr24, LLDB_INVALID_REGNUM),
+ DEFINE_LSX(vr25, LLDB_INVALID_REGNUM),
+ DEFINE_LSX(vr26, LLDB_INVALID_REGNUM),
+ DEFINE_LSX(vr27, LLDB_INVALID_REGNUM),
+ DEFINE_LSX(vr28, LLDB_INVALID_REGNUM),
+ DEFINE_LSX(vr29, LLDB_INVALID_REGNUM),
+ DEFINE_LSX(vr30, LLDB_INVALID_REGNUM),
+ DEFINE_LSX(vr31, LLDB_INVALID_REGNUM),
+
+ DEFINE_LASX(xr0, LLDB_INVALID_REGNUM),
+ DEFINE_LASX(xr1, LLDB_INVALID_REGNUM),
+ DEFINE_LASX(xr2, LLDB_INVALID_REGNUM),
+ DEFINE_LASX(xr3, LLDB_INVALID_REGNUM),
+ DEFINE_LASX(xr4, LLDB_INVALID_REGNUM),
+ DEFINE_LASX(xr5, LLDB_INVALID_REGNUM),
+ DEFINE_LASX(xr6, LLDB_INVALID_REGNUM),
+ DEFINE_LASX(xr7, LLDB_INVALID_REGNUM),
+ DEFINE_LASX(xr8, LLDB_INVALID_REGNUM),
+ DEFINE_LASX(xr9, LLDB_INVALID_REGNUM),
+ DEFINE_LASX(xr10, LLDB_INVALID_REGNUM),
+ DEFINE_LASX(xr11, LLDB_INVALID_REGNUM),
+ DEFINE_LASX(xr12, LLDB_INVALID_REGNUM),
+ DEFINE_LASX(xr13, LLDB_INVALID_REGNUM),
+ DEFINE_LASX(xr14, LLDB_INVALID_REGNUM),
+ DEFINE_LASX(xr15, LLDB_INVALID_REGNUM),
+ DEFINE_LASX(xr16, LLDB_INVALID_REGNUM),
+ DEFINE_LASX(xr17, LLDB_INVALID_REGNUM),
+ DEFINE_LASX(xr18, LLDB_INVALID_REGNUM),
+ DEFINE_LASX(xr19, LLDB_INVALID_REGNUM),
+ DEFINE_LASX(xr20, LLDB_INVALID_REGNUM),
+ DEFINE_LASX(xr21, LLDB_INVALID_REGNUM),
+ DEFINE_LASX(xr22, LLDB_INVALID_REGNUM),
+ DEFINE_LASX(xr23, LLDB_INVALID_REGNUM),
+ DEFINE_LASX(xr24, LLDB_INVALID_REGNUM),
+ DEFINE_LASX(xr25, LLDB_INVALID_REGNUM),
+ DEFINE_LASX(xr26, LLDB_INVALID_REGNUM),
+ DEFINE_LASX(xr27, LLDB_INVALID_REGNUM),
+ DEFINE_LASX(xr28, LLDB_INVALID_REGNUM),
+ DEFINE_LASX(xr29, LLDB_INVALID_REGNUM),
+ DEFINE_LASX(xr30, LLDB_INVALID_REGNUM),
+ DEFINE_LASX(xr31, LLDB_INVALID_REGNUM),
};
#endif // DECLARE_REGISTER_INFOS_LOONGARCH64_STRUCT
diff --git a/lldb/source/Plugins/Process/Utility/lldb-loongarch-register-enums.h b/lldb/source/Plugins/Process/Utility/lldb-loongarch-register-enums.h
index f55c807f86c00e..accd53048f93e2 100644
--- a/lldb/source/Plugins/Process/Utility/lldb-loongarch-register-enums.h
+++ b/lldb/source/Plugins/Process/Utility/lldb-loongarch-register-enums.h
@@ -172,6 +172,76 @@ enum {
fpr_fs6_loongarch = fpr_f30_loongarch,
fpr_fs7_loongarch = fpr_f31_loongarch,
+ lsx_first_loongarch = fpr_last_loongarch + 1,
+ lsx_vr0_loongarch = lsx_first_loongarch,
+ lsx_vr1_loongarch,
+ lsx_vr2_loongarch,
+ lsx_vr3_loongarch,
+ lsx_vr4_loongarch,
+ lsx_vr5_loongarch,
+ lsx_vr6_loongarch,
+ lsx_vr7_loongarch,
+ lsx_vr8_loongarch,
+ lsx_vr9_loongarch,
+ lsx_vr10_loongarch,
+ lsx_vr11_loongarch,
+ lsx_vr12_loongarch,
+ lsx_vr13_loongarch,
+ lsx_vr14_loongarch,
+ lsx_vr15_loongarch,
+ lsx_vr16_loongarch,
+ lsx_vr17_loongarch,
+ lsx_vr18_loongarch,
+ lsx_vr19_loongarch,
+ lsx_vr20_loongarch,
+ lsx_vr21_loongarch,
+ lsx_vr22_loongarch,
+ lsx_vr23_loongarch,
+ lsx_vr24_loongarch,
+ lsx_vr25_loongarch,
+ lsx_vr26_loongarch,
+ lsx_vr27_loongarch,
+ lsx_vr28_loongarch,
+ lsx_vr29_loongarch,
+ lsx_vr30_loongarch,
+ lsx_vr31_loongarch,
+ lsx_last_loongarch = lsx_vr31_loongarch,
+
+ lasx_first_loongarch = lsx_last_loongarch + 1,
+ lasx_xr0_loongarch = lasx_first_loongarch,
+ lasx_xr1_loongarch,
+ lasx_xr2_loongarch,
+ lasx_xr3_loongarch,
+ lasx_xr4_loongarch,
+ lasx_xr5_loongarch,
+ lasx_xr6_loongarch,
+ lasx_xr7_loongarch,
+ lasx_xr8_loongarch,
+ lasx_xr9_loongarch,
+ lasx_xr10_loongarch,
+ lasx_xr11_loongarch,
+ lasx_xr12_loongarch,
+ lasx_xr13_loongarch,
+ lasx_xr14_loongarch,
+ lasx_xr15_loongarch,
+ lasx_xr16_loongarch,
+ lasx_xr17_loongarch,
+ lasx_xr18_loongarch,
+ lasx_xr19_loongarch,
+ lasx_xr20_loongarch,
+ lasx_xr21_loongarch,
+ lasx_xr22_loongarch,
+ lasx_xr23_loongarch,
+ lasx_xr24_loongarch,
+ lasx_xr25_loongarch,
+ lasx_xr26_loongarch,
+ lasx_xr27_loongarch,
+ lasx_xr28_loongarch,
+ lasx_xr29_loongarch,
+ lasx_xr30_loongarch,
+ lasx_xr31_loongarch,
+ lasx_last_loongarch = lasx_xr31_loongarch,
+
k_num_registers_loongarch
};
diff --git a/lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.cpp b/lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.cpp
index f0500948a6ab22..f5718fbeba6439 100644
--- a/lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.cpp
+++ b/lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.cpp
@@ -48,6 +48,10 @@ bool RegisterContextCorePOSIX_loongarch64::ReadGPR() { return true; }
bool RegisterContextCorePOSIX_loongarch64::ReadFPR() { return true; }
+bool RegisterContextCorePOSIX_loongarch64::ReadLSX() { return true; }
+
+bool RegisterContextCorePOSIX_loongarch64::ReadLASX() { return true; }
+
bool RegisterContextCorePOSIX_loongarch64::WriteGPR() {
assert(false && "Writing registers is not allowed for core dumps");
return false;
@@ -58,6 +62,16 @@ bool RegisterContextCorePOSIX_loongarch64::WriteFPR() {
return false;
}
+bool RegisterContextCorePOSIX_loongarch64::WriteLSX() {
+ assert(false && "Writing registers is not allowed for core dumps");
+ return false;
+}
+
+bool RegisterContextCorePOSIX_loongarch64::WriteLASX() {
+ assert(false && "Writing registers is not allowed for core dumps");
+ return false;
+}
+
bool RegisterContextCorePOSIX_loongarch64::ReadRegister(
const RegisterInfo *reg_info, RegisterValue &value) {
const uint8_t *src = nullptr;
diff --git a/lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.h b/lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.h
index 7bb53bd642030a..11ebe573aaeec8 100644
--- a/lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.h
+++ b/lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.h
@@ -46,10 +46,18 @@ class RegisterContextCorePOSIX_loongarch64
bool ReadFPR() override;
+ bool ReadLSX() override;
+
+ bool ReadLASX() override;
+
bool WriteGPR() override;
bool WriteFPR() override;
+ bool WriteLSX() override;
+
+ bool WriteLASX() override;
+
private:
lldb_private::DataExtractor m_gpr;
lldb_private::DataExtractor m_fpr;
diff --git a/lldb/source/Utility/LoongArch_DWARF_Registers.h b/lldb/source/Utility/LoongArch_DWARF_Registers.h
index 596806348ee245..264f329d71e079 100644
--- a/lldb/source/Utility/LoongArch_DWARF_Registers.h
+++ b/lldb/source/Utility/LoongArch_DWARF_Registers.h
@@ -90,6 +90,72 @@ enum {
dwarf_fpr_fcc7,
dwarf_fpr_fcsr,
+ dwarf_lsx_vr0,
+ dwarf_lsx_vr1,
+ dwarf_lsx_vr2,
+ dwarf_lsx_vr3,
+ dwarf_lsx_vr4,
+ dwarf_lsx_vr5,
+ dwarf_lsx_vr6,
+ dwarf_lsx_vr7,
+ dwarf_lsx_vr8,
+ dwarf_lsx_vr9,
+ dwarf_lsx_vr10,
+ dwarf_lsx_vr11,
+ dwarf_lsx_vr12,
+ dwarf_lsx_vr13,
+ dwarf_lsx_vr14,
+ dwarf_lsx_vr15,
+ dwarf_lsx_vr16,
+ dwarf_lsx_vr17,
+ dwarf_lsx_vr18,
+ dwarf_lsx_vr19,
+ dwarf_lsx_vr20,
+ dwarf_lsx_vr21,
+ dwarf_lsx_vr22,
+ dwarf_lsx_vr23,
+ dwarf_lsx_vr24,
+ dwarf_lsx_vr25,
+ dwarf_lsx_vr26,
+ dwarf_lsx_vr27,
+ dwarf_lsx_vr28,
+ dwarf_lsx_vr29,
+ dwarf_lsx_vr30,
+ dwarf_lsx_vr31,
+
+ dwarf_lasx_xr0,
+ dwarf_lasx_xr1,
+ dwarf_lasx_xr2,
+ dwarf_lasx_xr3,
+ dwarf_lasx_xr4,
+ dwarf_lasx_xr5,
+ dwarf_lasx_xr6,
+ dwarf_lasx_xr7,
+ dwarf_lasx_xr8,
+ dwarf_lasx_xr9,
+ dwarf_lasx_xr10,
+ dwarf_lasx_xr11,
+ dwarf_lasx_xr12,
+ dwarf_lasx_xr13,
+ dwarf_lasx_xr14,
+ dwarf_lasx_xr15,
+ dwarf_lasx_xr16,
+ dwarf_lasx_xr17,
+ dwarf_lasx_xr18,
+ dwarf_lasx_xr19,
+ dwarf_lasx_xr20,
+ dwarf_lasx_xr21,
+ dwarf_lasx_xr22,
+ dwarf_lasx_xr23,
+ dwarf_lasx_xr24,
+ dwarf_lasx_xr25,
+ dwarf_lasx_xr26,
+ dwarf_lasx_xr27,
+ dwarf_lasx_xr28,
+ dwarf_lasx_xr29,
+ dwarf_lasx_xr30,
+ dwarf_lasx_xr31,
+
// register name alias
dwarf_gpr_zero = dwarf_gpr_r0,
dwarf_gpr_ra = dwarf_gpr_r1,
>From 6eea910603e9ed9692750e420c93cf98734d1cb9 Mon Sep 17 00:00:00 2001
From: wanglei <wanglei at loongson.cn>
Date: Fri, 27 Dec 2024 17:06:48 +0800
Subject: [PATCH 2/3] Add tests and remove Core-related modifications
Created using spr 1.3.5-bogner
---
...NativeRegisterContextLinux_loongarch64.cpp | 3 +-
.../RegisterContextPOSIX_loongarch64.h | 8 +-
.../RegisterContextPOSIXCore_loongarch64.cpp | 14 ---
.../RegisterContextPOSIXCore_loongarch64.h | 8 --
.../Register/Inputs/loongarch64-lasx-read.cpp | 41 +++++++++
.../Inputs/loongarch64-lasx-write.cpp | 89 +++++++++++++++++++
.../Register/Inputs/loongarch64-lsx-read.cpp | 41 +++++++++
.../Register/Inputs/loongarch64-lsx-write.cpp | 89 +++++++++++++++++++
.../Shell/Register/loongarch64-lasx-read.test | 40 +++++++++
.../Register/loongarch64-lasx-write.test | 78 ++++++++++++++++
.../Shell/Register/loongarch64-lsx-read.test | 38 ++++++++
.../Shell/Register/loongarch64-lsx-write.test | 78 ++++++++++++++++
lldb/utils/lit-cpuid/lit-cpuid.cpp | 10 +++
llvm/utils/lit/lit/llvm/config.py | 2 +
14 files changed, 512 insertions(+), 27 deletions(-)
create mode 100644 lldb/test/Shell/Register/Inputs/loongarch64-lasx-read.cpp
create mode 100644 lldb/test/Shell/Register/Inputs/loongarch64-lasx-write.cpp
create mode 100644 lldb/test/Shell/Register/Inputs/loongarch64-lsx-read.cpp
create mode 100644 lldb/test/Shell/Register/Inputs/loongarch64-lsx-write.cpp
create mode 100644 lldb/test/Shell/Register/loongarch64-lasx-read.test
create mode 100644 lldb/test/Shell/Register/loongarch64-lasx-write.test
create mode 100644 lldb/test/Shell/Register/loongarch64-lsx-read.test
create mode 100644 lldb/test/Shell/Register/loongarch64-lsx-write.test
diff --git a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp
index 2eeea46f7f6836..424a505a3d78e1 100644
--- a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp
+++ b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp
@@ -35,7 +35,8 @@
#define NT_LARCH_LASX 0xa03 /* LoongArch Advanced SIMD eXtension registers */
#endif
-#define REG_CONTEXT_SIZE (GetGPRSize() + GetFPRSize())
+#define REG_CONTEXT_SIZE \
+ (GetGPRSize() + GetFPRSize() + sizeof(m_lsx) + sizeof(m_lasx))
using namespace lldb;
using namespace lldb_private;
diff --git a/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.h b/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.h
index 8804eb79f8d74d..dca24e4b585bf4 100644
--- a/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.h
+++ b/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.h
@@ -60,12 +60,12 @@ class RegisterContextPOSIX_loongarch64 : public lldb_private::RegisterContext {
virtual bool ReadGPR() = 0;
virtual bool ReadFPR() = 0;
- virtual bool ReadLSX() = 0;
- virtual bool ReadLASX() = 0;
+ virtual bool ReadLSX() { return false; }
+ virtual bool ReadLASX() { return false; }
virtual bool WriteGPR() = 0;
virtual bool WriteFPR() = 0;
- virtual bool WriteLSX() = 0;
- virtual bool WriteLASX() = 0;
+ virtual bool WriteLSX() { return false; }
+ virtual bool WriteLASX() { return false; }
};
#endif // LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERCONTEXTPOSIX_LOONGARCH64_H
diff --git a/lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.cpp b/lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.cpp
index f5718fbeba6439..f0500948a6ab22 100644
--- a/lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.cpp
+++ b/lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.cpp
@@ -48,10 +48,6 @@ bool RegisterContextCorePOSIX_loongarch64::ReadGPR() { return true; }
bool RegisterContextCorePOSIX_loongarch64::ReadFPR() { return true; }
-bool RegisterContextCorePOSIX_loongarch64::ReadLSX() { return true; }
-
-bool RegisterContextCorePOSIX_loongarch64::ReadLASX() { return true; }
-
bool RegisterContextCorePOSIX_loongarch64::WriteGPR() {
assert(false && "Writing registers is not allowed for core dumps");
return false;
@@ -62,16 +58,6 @@ bool RegisterContextCorePOSIX_loongarch64::WriteFPR() {
return false;
}
-bool RegisterContextCorePOSIX_loongarch64::WriteLSX() {
- assert(false && "Writing registers is not allowed for core dumps");
- return false;
-}
-
-bool RegisterContextCorePOSIX_loongarch64::WriteLASX() {
- assert(false && "Writing registers is not allowed for core dumps");
- return false;
-}
-
bool RegisterContextCorePOSIX_loongarch64::ReadRegister(
const RegisterInfo *reg_info, RegisterValue &value) {
const uint8_t *src = nullptr;
diff --git a/lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.h b/lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.h
index 11ebe573aaeec8..7bb53bd642030a 100644
--- a/lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.h
+++ b/lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.h
@@ -46,18 +46,10 @@ class RegisterContextCorePOSIX_loongarch64
bool ReadFPR() override;
- bool ReadLSX() override;
-
- bool ReadLASX() override;
-
bool WriteGPR() override;
bool WriteFPR() override;
- bool WriteLSX() override;
-
- bool WriteLASX() override;
-
private:
lldb_private::DataExtractor m_gpr;
lldb_private::DataExtractor m_fpr;
diff --git a/lldb/test/Shell/Register/Inputs/loongarch64-lasx-read.cpp b/lldb/test/Shell/Register/Inputs/loongarch64-lasx-read.cpp
new file mode 100644
index 00000000000000..b699fd64b94099
--- /dev/null
+++ b/lldb/test/Shell/Register/Inputs/loongarch64-lasx-read.cpp
@@ -0,0 +1,41 @@
+#include <cstdint>
+
+int main() {
+ asm volatile("xvrepli.d $xr0, 16\n\t"
+ "xvrepli.w $xr1, 16\n\t"
+ "xvrepli.h $xr2, 16\n\t"
+ "xvrepli.b $xr3, 16\n\t"
+ "xvrepli.d $xr4, 15\n\t"
+ "xvrepli.w $xr5, 15\n\t"
+ "xvrepli.h $xr6, 15\n\t"
+ "xvrepli.b $xr7, 15\n\t"
+ "xvrepli.d $xr8, 14\n\t"
+ "xvrepli.w $xr9, 14\n\t"
+ "xvrepli.h $xr10, 14\n\t"
+ "xvrepli.b $xr11, 14\n\t"
+ "xvrepli.d $xr12, 13\n\t"
+ "xvrepli.w $xr13, 13\n\t"
+ "xvrepli.h $xr14, 13\n\t"
+ "xvrepli.b $xr15, 13\n\t"
+ "xvrepli.d $xr16, 12\n\t"
+ "xvrepli.w $xr17, 12\n\t"
+ "xvrepli.h $xr18, 12\n\t"
+ "xvrepli.b $xr19, 12\n\t"
+ "xvrepli.d $xr20, 11\n\t"
+ "xvrepli.w $xr21, 11\n\t"
+ "xvrepli.h $xr22, 11\n\t"
+ "xvrepli.b $xr23, 11\n\t"
+ "xvrepli.d $xr24, 10\n\t"
+ "xvrepli.w $xr25, 10\n\t"
+ "xvrepli.h $xr26, 10\n\t"
+ "xvrepli.b $xr27, 10\n\t"
+ "xvrepli.d $xr28, 9\n\t"
+ "xvrepli.w $xr29, 9\n\t"
+ "xvrepli.h $xr30, 9\n\t"
+ "xvrepli.b $xr31, 9\n\t"
+ "nop\n\t"
+ "break 5\n\t" ::
+ : "$xr24", "$xr25", "$xr26", "$xr27", "$xr28", "$xr29", "$xr30", "$xr31");
+
+ return 0;
+}
diff --git a/lldb/test/Shell/Register/Inputs/loongarch64-lasx-write.cpp b/lldb/test/Shell/Register/Inputs/loongarch64-lasx-write.cpp
new file mode 100644
index 00000000000000..71157cdc9aed0b
--- /dev/null
+++ b/lldb/test/Shell/Register/Inputs/loongarch64-lasx-write.cpp
@@ -0,0 +1,89 @@
+#include <cinttypes>
+#include <cstdint>
+#include <cstdio>
+
+union alignas(32) lasx_t {
+ uint64_t as_uint64[4];
+ uint8_t as_uint8[32];
+};
+
+int main() {
+ lasx_t lasx[32] = {0};
+
+ asm volatile("xvrepli.b $xr0, 0\n\t"
+ "xvrepli.b $xr1, 0\n\t"
+ "xvrepli.b $xr2, 0\n\t"
+ "xvrepli.b $xr3, 0\n\t"
+ "xvrepli.b $xr4, 0\n\t"
+ "xvrepli.b $xr5, 0\n\t"
+ "xvrepli.b $xr6, 0\n\t"
+ "xvrepli.b $xr7, 0\n\t"
+ "xvrepli.b $xr8, 0\n\t"
+ "xvrepli.b $xr9, 0\n\t"
+ "xvrepli.b $xr10, 0\n\t"
+ "xvrepli.b $xr11, 0\n\t"
+ "xvrepli.b $xr12, 0\n\t"
+ "xvrepli.b $xr13, 0\n\t"
+ "xvrepli.b $xr14, 0\n\t"
+ "xvrepli.b $xr15, 0\n\t"
+ "xvrepli.b $xr16, 0\n\t"
+ "xvrepli.b $xr17, 0\n\t"
+ "xvrepli.b $xr18, 0\n\t"
+ "xvrepli.b $xr19, 0\n\t"
+ "xvrepli.b $xr20, 0\n\t"
+ "xvrepli.b $xr21, 0\n\t"
+ "xvrepli.b $xr22, 0\n\t"
+ "xvrepli.b $xr23, 0\n\t"
+ "xvrepli.b $xr24, 0\n\t"
+ "xvrepli.b $xr25, 0\n\t"
+ "xvrepli.b $xr26, 0\n\t"
+ "xvrepli.b $xr27, 0\n\t"
+ "xvrepli.b $xr28, 0\n\t"
+ "xvrepli.b $xr29, 0\n\t"
+ "xvrepli.b $xr30, 0\n\t"
+ "xvrepli.b $xr31, 0\n\t"
+ "break 5\n\t"
+ "move $t0, %0\n\t"
+ "xvst $xr0, $t0, 0\n\t"
+ "xvst $xr1, $t0, 32\n\t"
+ "xvst $xr2, $t0, 64\n\t"
+ "xvst $xr3, $t0, 96\n\t"
+ "xvst $xr4, $t0, 128\n\t"
+ "xvst $xr5, $t0, 160\n\t"
+ "xvst $xr6, $t0, 192\n\t"
+ "xvst $xr7, $t0, 224\n\t"
+ "xvst $xr8, $t0, 256\n\t"
+ "xvst $xr9, $t0, 288\n\t"
+ "xvst $xr10, $t0, 320\n\t"
+ "xvst $xr11, $t0, 352\n\t"
+ "xvst $xr12, $t0, 384\n\t"
+ "xvst $xr13, $t0, 416\n\t"
+ "xvst $xr14, $t0, 448\n\t"
+ "xvst $xr15, $t0, 480\n\t"
+ "xvst $xr16, $t0, 512\n\t"
+ "xvst $xr17, $t0, 544\n\t"
+ "xvst $xr18, $t0, 576\n\t"
+ "xvst $xr19, $t0, 608\n\t"
+ "xvst $xr20, $t0, 640\n\t"
+ "xvst $xr21, $t0, 672\n\t"
+ "xvst $xr22, $t0, 704\n\t"
+ "xvst $xr23, $t0, 736\n\t"
+ "xvst $xr24, $t0, 768\n\t"
+ "xvst $xr25, $t0, 800\n\t"
+ "xvst $xr26, $t0, 832\n\t"
+ "xvst $xr27, $t0, 864\n\t"
+ "xvst $xr28, $t0, 896\n\t"
+ "xvst $xr29, $t0, 928\n\t"
+ "xvst $xr30, $t0, 960\n\t"
+ "xvst $xr31, $t0, 992\n\t" ::"r"(&lasx)
+ : "$t0", "$xr24", "$xr25", "$xr26", "$xr27", "$xr28", "$xr29", "$xr30", "$xr31");
+
+ for (int i = 0; i < 32; ++i) {
+ printf("xr%d = { ", i);
+ for (int j = 0; j < sizeof(lasx->as_uint8); ++j)
+ printf("0x%02x ", lasx[i].as_uint8[j]);
+ printf("}\n");
+ }
+
+ return 0;
+}
diff --git a/lldb/test/Shell/Register/Inputs/loongarch64-lsx-read.cpp b/lldb/test/Shell/Register/Inputs/loongarch64-lsx-read.cpp
new file mode 100644
index 00000000000000..8536c8750f4ed1
--- /dev/null
+++ b/lldb/test/Shell/Register/Inputs/loongarch64-lsx-read.cpp
@@ -0,0 +1,41 @@
+#include <cstdint>
+
+int main() {
+ asm volatile("vrepli.d $vr0, 1\n\t"
+ "vrepli.w $vr1, 1\n\t"
+ "vrepli.h $vr2, 1\n\t"
+ "vrepli.b $vr3, 1\n\t"
+ "vrepli.d $vr4, 2\n\t"
+ "vrepli.w $vr5, 2\n\t"
+ "vrepli.h $vr6, 2\n\t"
+ "vrepli.b $vr7, 2\n\t"
+ "vrepli.d $vr8, 3\n\t"
+ "vrepli.w $vr9, 3\n\t"
+ "vrepli.h $vr10, 3\n\t"
+ "vrepli.b $vr11, 3\n\t"
+ "vrepli.d $vr12, 4\n\t"
+ "vrepli.w $vr13, 4\n\t"
+ "vrepli.h $vr14, 4\n\t"
+ "vrepli.b $vr15, 4\n\t"
+ "vrepli.d $vr16, 5\n\t"
+ "vrepli.w $vr17, 5\n\t"
+ "vrepli.h $vr18, 5\n\t"
+ "vrepli.b $vr19, 5\n\t"
+ "vrepli.d $vr20, 6\n\t"
+ "vrepli.w $vr21, 6\n\t"
+ "vrepli.h $vr22, 6\n\t"
+ "vrepli.b $vr23, 6\n\t"
+ "vrepli.d $vr24, 7\n\t"
+ "vrepli.w $vr25, 7\n\t"
+ "vrepli.h $vr26, 7\n\t"
+ "vrepli.b $vr27, 7\n\t"
+ "vrepli.d $vr28, 8\n\t"
+ "vrepli.w $vr29, 8\n\t"
+ "vrepli.h $vr30, 8\n\t"
+ "vrepli.b $vr31, 8\n\t"
+ "nop\n\t"
+ "break 5\n\t" ::
+ : "$vr24", "$vr25", "$vr26", "$vr27", "$vr28", "$vr29", "$vr30", "$vr31");
+
+ return 0;
+}
diff --git a/lldb/test/Shell/Register/Inputs/loongarch64-lsx-write.cpp b/lldb/test/Shell/Register/Inputs/loongarch64-lsx-write.cpp
new file mode 100644
index 00000000000000..4f3e69f017214d
--- /dev/null
+++ b/lldb/test/Shell/Register/Inputs/loongarch64-lsx-write.cpp
@@ -0,0 +1,89 @@
+#include <cinttypes>
+#include <cstdint>
+#include <cstdio>
+
+union alignas(16) lsx_t {
+ uint64_t as_uint64[2];
+ uint8_t as_uint8[16];
+};
+
+int main() {
+ lsx_t lsx[32] = {0};
+
+ asm volatile("vrepli.b $vr0, 0\n\t"
+ "vrepli.b $vr1, 0\n\t"
+ "vrepli.b $vr2, 0\n\t"
+ "vrepli.b $vr3, 0\n\t"
+ "vrepli.b $vr4, 0\n\t"
+ "vrepli.b $vr5, 0\n\t"
+ "vrepli.b $vr6, 0\n\t"
+ "vrepli.b $vr7, 0\n\t"
+ "vrepli.b $vr8, 0\n\t"
+ "vrepli.b $vr9, 0\n\t"
+ "vrepli.b $vr10, 0\n\t"
+ "vrepli.b $vr11, 0\n\t"
+ "vrepli.b $vr12, 0\n\t"
+ "vrepli.b $vr13, 0\n\t"
+ "vrepli.b $vr14, 0\n\t"
+ "vrepli.b $vr15, 0\n\t"
+ "vrepli.b $vr16, 0\n\t"
+ "vrepli.b $vr17, 0\n\t"
+ "vrepli.b $vr18, 0\n\t"
+ "vrepli.b $vr19, 0\n\t"
+ "vrepli.b $vr20, 0\n\t"
+ "vrepli.b $vr21, 0\n\t"
+ "vrepli.b $vr22, 0\n\t"
+ "vrepli.b $vr23, 0\n\t"
+ "vrepli.b $vr24, 0\n\t"
+ "vrepli.b $vr25, 0\n\t"
+ "vrepli.b $vr26, 0\n\t"
+ "vrepli.b $vr27, 0\n\t"
+ "vrepli.b $vr28, 0\n\t"
+ "vrepli.b $vr29, 0\n\t"
+ "vrepli.b $vr30, 0\n\t"
+ "vrepli.b $vr31, 0\n\t"
+ "break 5\n\t"
+ "move $t0, %0\n\t"
+ "vst $vr0, $t0, 0\n\t"
+ "vst $vr1, $t0, 16\n\t"
+ "vst $vr2, $t0, 32\n\t"
+ "vst $vr3, $t0, 48\n\t"
+ "vst $vr4, $t0, 64\n\t"
+ "vst $vr5, $t0, 80\n\t"
+ "vst $vr6, $t0, 96\n\t"
+ "vst $vr7, $t0, 112\n\t"
+ "vst $vr8, $t0, 128\n\t"
+ "vst $vr9, $t0, 144\n\t"
+ "vst $vr10, $t0, 160\n\t"
+ "vst $vr11, $t0, 176\n\t"
+ "vst $vr12, $t0, 192\n\t"
+ "vst $vr13, $t0, 208\n\t"
+ "vst $vr14, $t0, 224\n\t"
+ "vst $vr15, $t0, 240\n\t"
+ "vst $vr16, $t0, 256\n\t"
+ "vst $vr17, $t0, 272\n\t"
+ "vst $vr18, $t0, 288\n\t"
+ "vst $vr19, $t0, 304\n\t"
+ "vst $vr20, $t0, 320\n\t"
+ "vst $vr21, $t0, 336\n\t"
+ "vst $vr22, $t0, 352\n\t"
+ "vst $vr23, $t0, 368\n\t"
+ "vst $vr24, $t0, 384\n\t"
+ "vst $vr25, $t0, 400\n\t"
+ "vst $vr26, $t0, 416\n\t"
+ "vst $vr27, $t0, 432\n\t"
+ "vst $vr28, $t0, 448\n\t"
+ "vst $vr29, $t0, 464\n\t"
+ "vst $vr30, $t0, 480\n\t"
+ "vst $vr31, $t0, 496\n\t" ::"r"(&lsx)
+ : "$t0", "$vr24", "$vr25", "$vr26", "$vr27", "$vr28", "$vr29", "$vr30", "$vr31");
+
+ for (int i = 0; i < 32; ++i) {
+ printf("vr%d = { ", i);
+ for (int j = 0; j < sizeof(lsx->as_uint8); ++j)
+ printf("0x%02x ", lsx[i].as_uint8[j]);
+ printf("}\n");
+ }
+
+ return 0;
+}
diff --git a/lldb/test/Shell/Register/loongarch64-lasx-read.test b/lldb/test/Shell/Register/loongarch64-lasx-read.test
new file mode 100644
index 00000000000000..7467ba8bcfd47f
--- /dev/null
+++ b/lldb/test/Shell/Register/loongarch64-lasx-read.test
@@ -0,0 +1,40 @@
+# REQUIRES: native && target-loongarch64 && native-cpu-lasx
+# RUN: %clangxx_host -mlasx %p/Inputs/loongarch64-lasx-read.cpp -o %t
+# RUN: %lldb -b -s %s %t | FileCheck %s
+process launch
+
+register read --all
+
+ # CHECK-DAG: xr0 = {0x10 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x10 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x10 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x10 0x00 0x00 0x00 0x00 0x00 0x00 0x00}
+ # CHECK-DAG: xr1 = {0x10 0x00 0x00 0x00 0x10 0x00 0x00 0x00 0x10 0x00 0x00 0x00 0x10 0x00 0x00 0x00 0x10 0x00 0x00 0x00 0x10 0x00 0x00 0x00 0x10 0x00 0x00 0x00 0x10 0x00 0x00 0x00}
+ # CHECK-DAG: xr2 = {0x10 0x00 0x10 0x00 0x10 0x00 0x10 0x00 0x10 0x00 0x10 0x00 0x10 0x00 0x10 0x00 0x10 0x00 0x10 0x00 0x10 0x00 0x10 0x00 0x10 0x00 0x10 0x00 0x10 0x00 0x10 0x00}
+ # CHECK-DAG: xr3 = {0x10 0x10 0x10 0x10 0x10 0x10 0x10 0x10 0x10 0x10 0x10 0x10 0x10 0x10 0x10 0x10 0x10 0x10 0x10 0x10 0x10 0x10 0x10 0x10 0x10 0x10 0x10 0x10 0x10 0x10 0x10 0x10}
+ # CHECK-DAG: xr4 = {0x0f 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x0f 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x0f 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x0f 0x00 0x00 0x00 0x00 0x00 0x00 0x00}
+ # CHECK-DAG: xr5 = {0x0f 0x00 0x00 0x00 0x0f 0x00 0x00 0x00 0x0f 0x00 0x00 0x00 0x0f 0x00 0x00 0x00 0x0f 0x00 0x00 0x00 0x0f 0x00 0x00 0x00 0x0f 0x00 0x00 0x00 0x0f 0x00 0x00 0x00}
+ # CHECK-DAG: xr6 = {0x0f 0x00 0x0f 0x00 0x0f 0x00 0x0f 0x00 0x0f 0x00 0x0f 0x00 0x0f 0x00 0x0f 0x00 0x0f 0x00 0x0f 0x00 0x0f 0x00 0x0f 0x00 0x0f 0x00 0x0f 0x00 0x0f 0x00 0x0f 0x00}
+ # CHECK-DAG: xr7 = {0x0f 0x0f 0x0f 0x0f 0x0f 0x0f 0x0f 0x0f 0x0f 0x0f 0x0f 0x0f 0x0f 0x0f 0x0f 0x0f 0x0f 0x0f 0x0f 0x0f 0x0f 0x0f 0x0f 0x0f 0x0f 0x0f 0x0f 0x0f 0x0f 0x0f 0x0f 0x0f}
+ # CHECK-DAG: xr8 = {0x0e 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x0e 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x0e 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x0e 0x00 0x00 0x00 0x00 0x00 0x00 0x00}
+ # CHECK-DAG: xr9 = {0x0e 0x00 0x00 0x00 0x0e 0x00 0x00 0x00 0x0e 0x00 0x00 0x00 0x0e 0x00 0x00 0x00 0x0e 0x00 0x00 0x00 0x0e 0x00 0x00 0x00 0x0e 0x00 0x00 0x00 0x0e 0x00 0x00 0x00}
+ # CHECK-DAG: xr10 = {0x0e 0x00 0x0e 0x00 0x0e 0x00 0x0e 0x00 0x0e 0x00 0x0e 0x00 0x0e 0x00 0x0e 0x00 0x0e 0x00 0x0e 0x00 0x0e 0x00 0x0e 0x00 0x0e 0x00 0x0e 0x00 0x0e 0x00 0x0e 0x00}
+ # CHECK-DAG: xr11 = {0x0e 0x0e 0x0e 0x0e 0x0e 0x0e 0x0e 0x0e 0x0e 0x0e 0x0e 0x0e 0x0e 0x0e 0x0e 0x0e 0x0e 0x0e 0x0e 0x0e 0x0e 0x0e 0x0e 0x0e 0x0e 0x0e 0x0e 0x0e 0x0e 0x0e 0x0e 0x0e}
+ # CHECK-DAG: xr12 = {0x0d 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x0d 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x0d 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x0d 0x00 0x00 0x00 0x00 0x00 0x00 0x00}
+ # CHECK-DAG: xr13 = {0x0d 0x00 0x00 0x00 0x0d 0x00 0x00 0x00 0x0d 0x00 0x00 0x00 0x0d 0x00 0x00 0x00 0x0d 0x00 0x00 0x00 0x0d 0x00 0x00 0x00 0x0d 0x00 0x00 0x00 0x0d 0x00 0x00 0x00}
+ # CHECK-DAG: xr14 = {0x0d 0x00 0x0d 0x00 0x0d 0x00 0x0d 0x00 0x0d 0x00 0x0d 0x00 0x0d 0x00 0x0d 0x00 0x0d 0x00 0x0d 0x00 0x0d 0x00 0x0d 0x00 0x0d 0x00 0x0d 0x00 0x0d 0x00 0x0d 0x00}
+ # CHECK-DAG: xr15 = {0x0d 0x0d 0x0d 0x0d 0x0d 0x0d 0x0d 0x0d 0x0d 0x0d 0x0d 0x0d 0x0d 0x0d 0x0d 0x0d 0x0d 0x0d 0x0d 0x0d 0x0d 0x0d 0x0d 0x0d 0x0d 0x0d 0x0d 0x0d 0x0d 0x0d 0x0d 0x0d}
+ # CHECK-DAG: xr16 = {0x0c 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x0c 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x0c 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x0c 0x00 0x00 0x00 0x00 0x00 0x00 0x00}
+ # CHECK-DAG: xr17 = {0x0c 0x00 0x00 0x00 0x0c 0x00 0x00 0x00 0x0c 0x00 0x00 0x00 0x0c 0x00 0x00 0x00 0x0c 0x00 0x00 0x00 0x0c 0x00 0x00 0x00 0x0c 0x00 0x00 0x00 0x0c 0x00 0x00 0x00}
+ # CHECK-DAG: xr18 = {0x0c 0x00 0x0c 0x00 0x0c 0x00 0x0c 0x00 0x0c 0x00 0x0c 0x00 0x0c 0x00 0x0c 0x00 0x0c 0x00 0x0c 0x00 0x0c 0x00 0x0c 0x00 0x0c 0x00 0x0c 0x00 0x0c 0x00 0x0c 0x00}
+ # CHECK-DAG: xr19 = {0x0c 0x0c 0x0c 0x0c 0x0c 0x0c 0x0c 0x0c 0x0c 0x0c 0x0c 0x0c 0x0c 0x0c 0x0c 0x0c 0x0c 0x0c 0x0c 0x0c 0x0c 0x0c 0x0c 0x0c 0x0c 0x0c 0x0c 0x0c 0x0c 0x0c 0x0c 0x0c}
+ # CHECK-DAG: xr20 = {0x0b 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x0b 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x0b 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x0b 0x00 0x00 0x00 0x00 0x00 0x00 0x00}
+ # CHECK-DAG: xr21 = {0x0b 0x00 0x00 0x00 0x0b 0x00 0x00 0x00 0x0b 0x00 0x00 0x00 0x0b 0x00 0x00 0x00 0x0b 0x00 0x00 0x00 0x0b 0x00 0x00 0x00 0x0b 0x00 0x00 0x00 0x0b 0x00 0x00 0x00}
+ # CHECK-DAG: xr22 = {0x0b 0x00 0x0b 0x00 0x0b 0x00 0x0b 0x00 0x0b 0x00 0x0b 0x00 0x0b 0x00 0x0b 0x00 0x0b 0x00 0x0b 0x00 0x0b 0x00 0x0b 0x00 0x0b 0x00 0x0b 0x00 0x0b 0x00 0x0b 0x00}
+ # CHECK-DAG: xr23 = {0x0b 0x0b 0x0b 0x0b 0x0b 0x0b 0x0b 0x0b 0x0b 0x0b 0x0b 0x0b 0x0b 0x0b 0x0b 0x0b 0x0b 0x0b 0x0b 0x0b 0x0b 0x0b 0x0b 0x0b 0x0b 0x0b 0x0b 0x0b 0x0b 0x0b 0x0b 0x0b}
+ # CHECK-DAG: xr24 = {0x0a 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x0a 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x0a 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x0a 0x00 0x00 0x00 0x00 0x00 0x00 0x00}
+ # CHECK-DAG: xr25 = {0x0a 0x00 0x00 0x00 0x0a 0x00 0x00 0x00 0x0a 0x00 0x00 0x00 0x0a 0x00 0x00 0x00 0x0a 0x00 0x00 0x00 0x0a 0x00 0x00 0x00 0x0a 0x00 0x00 0x00 0x0a 0x00 0x00 0x00}
+ # CHECK-DAG: xr26 = {0x0a 0x00 0x0a 0x00 0x0a 0x00 0x0a 0x00 0x0a 0x00 0x0a 0x00 0x0a 0x00 0x0a 0x00 0x0a 0x00 0x0a 0x00 0x0a 0x00 0x0a 0x00 0x0a 0x00 0x0a 0x00 0x0a 0x00 0x0a 0x00}
+ # CHECK-DAG: xr27 = {0x0a 0x0a 0x0a 0x0a 0x0a 0x0a 0x0a 0x0a 0x0a 0x0a 0x0a 0x0a 0x0a 0x0a 0x0a 0x0a 0x0a 0x0a 0x0a 0x0a 0x0a 0x0a 0x0a 0x0a 0x0a 0x0a 0x0a 0x0a 0x0a 0x0a 0x0a 0x0a}
+ # CHECK-DAG: xr28 = {0x09 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x09 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x09 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x09 0x00 0x00 0x00 0x00 0x00 0x00 0x00}
+ # CHECK-DAG: xr29 = {0x09 0x00 0x00 0x00 0x09 0x00 0x00 0x00 0x09 0x00 0x00 0x00 0x09 0x00 0x00 0x00 0x09 0x00 0x00 0x00 0x09 0x00 0x00 0x00 0x09 0x00 0x00 0x00 0x09 0x00 0x00 0x00}
+ # CHECK-DAG: xr30 = {0x09 0x00 0x09 0x00 0x09 0x00 0x09 0x00 0x09 0x00 0x09 0x00 0x09 0x00 0x09 0x00 0x09 0x00 0x09 0x00 0x09 0x00 0x09 0x00 0x09 0x00 0x09 0x00 0x09 0x00 0x09 0x00}
+ # CHECK-DAG: xr31 = {0x09 0x09 0x09 0x09 0x09 0x09 0x09 0x09 0x09 0x09 0x09 0x09 0x09 0x09 0x09 0x09 0x09 0x09 0x09 0x09 0x09 0x09 0x09 0x09 0x09 0x09 0x09 0x09 0x09 0x09 0x09 0x09}
+
diff --git a/lldb/test/Shell/Register/loongarch64-lasx-write.test b/lldb/test/Shell/Register/loongarch64-lasx-write.test
new file mode 100644
index 00000000000000..9a1c4b109ea809
--- /dev/null
+++ b/lldb/test/Shell/Register/loongarch64-lasx-write.test
@@ -0,0 +1,78 @@
+# REQUIRES: native && target-loongarch64 && native-cpu-lasx
+# RUN: %clangxx_host -mlasx %p/Inputs/loongarch64-lasx-write.cpp -o %t
+# RUN: %lldb -b -s %s %t | FileCheck %s
+process launch
+
+register write xr0 "{0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f}"
+register write xr1 "{0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20}"
+register write xr2 "{0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21}"
+register write xr3 "{0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22}"
+register write xr4 "{0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23}"
+register write xr5 "{0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24}"
+register write xr6 "{0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25}"
+register write xr7 "{0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26}"
+register write xr8 "{0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27}"
+register write xr9 "{0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28}"
+register write xr10 "{0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29}"
+register write xr11 "{0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a}"
+register write xr12 "{0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b}"
+register write xr13 "{0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b 0x2c}"
+register write xr14 "{0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b 0x2c 0x2d}"
+register write xr15 "{0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b 0x2c 0x2d 0x2e}"
+register write xr16 "{0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f}"
+register write xr17 "{0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20}"
+register write xr18 "{0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21}"
+register write xr19 "{0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22}"
+register write xr20 "{0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23}"
+register write xr21 "{0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24}"
+register write xr22 "{0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25}"
+register write xr23 "{0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26}"
+register write xr24 "{0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27}"
+register write xr25 "{0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28}"
+register write xr26 "{0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29}"
+register write xr27 "{0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a}"
+register write xr28 "{0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b}"
+register write xr29 "{0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b 0x2c}"
+register write xr30 "{0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b 0x2c 0x2d}"
+register write xr31 "{0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b 0x2c 0x2d 0x2e}"
+
+## skip `break 5`
+expression $pc=$pc+4
+
+process continue
+# CHECK: process
+
+# CHECK-DAG: xr0 = { 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f }
+# CHECK-DAG: xr1 = { 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 }
+# CHECK-DAG: xr2 = { 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 }
+# CHECK-DAG: xr3 = { 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 }
+# CHECK-DAG: xr4 = { 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 }
+# CHECK-DAG: xr5 = { 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 }
+# CHECK-DAG: xr6 = { 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 }
+# CHECK-DAG: xr7 = { 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 }
+# CHECK-DAG: xr8 = { 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 }
+# CHECK-DAG: xr9 = { 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 }
+# CHECK-DAG: xr10 = { 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 }
+# CHECK-DAG: xr11 = { 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a }
+# CHECK-DAG: xr12 = { 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b }
+# CHECK-DAG: xr13 = { 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b 0x2c }
+# CHECK-DAG: xr14 = { 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b 0x2c 0x2d }
+# CHECK-DAG: xr15 = { 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b 0x2c 0x2d 0x2e }
+# CHECK-DAG: xr16 = { 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f }
+# CHECK-DAG: xr17 = { 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 }
+# CHECK-DAG: xr18 = { 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 }
+# CHECK-DAG: xr19 = { 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 }
+# CHECK-DAG: xr20 = { 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 }
+# CHECK-DAG: xr21 = { 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 }
+# CHECK-DAG: xr22 = { 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 }
+# CHECK-DAG: xr23 = { 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 }
+# CHECK-DAG: xr24 = { 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 }
+# CHECK-DAG: xr25 = { 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 }
+# CHECK-DAG: xr26 = { 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 }
+# CHECK-DAG: xr27 = { 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a }
+# CHECK-DAG: xr28 = { 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b }
+# CHECK-DAG: xr29 = { 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b 0x2c }
+# CHECK-DAG: xr30 = { 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b 0x2c 0x2d }
+# CHECK-DAG: xr31 = { 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b 0x2c 0x2d 0x2e }
+
+# CHECK: Process {{[0-9]+}} exited with status = 0
diff --git a/lldb/test/Shell/Register/loongarch64-lsx-read.test b/lldb/test/Shell/Register/loongarch64-lsx-read.test
new file mode 100644
index 00000000000000..4d571a9eb157e7
--- /dev/null
+++ b/lldb/test/Shell/Register/loongarch64-lsx-read.test
@@ -0,0 +1,38 @@
+# REQUIRES: native && target-loongarch64 && native-cpu-lsx
+# RUN: %clangxx_host %p/Inputs/loongarch64-lsx-read.cpp -o %t
+# RUN: %lldb -b -s %s %t | FileCheck %s
+process launch
+
+register read --all
+# CHECK-DAG: vr0 = {0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00}
+# CHECK-DAG: vr1 = {0x01 0x00 0x00 0x00 0x01 0x00 0x00 0x00 0x01 0x00 0x00 0x00 0x01 0x00 0x00 0x00}
+# CHECK-DAG: vr2 = {0x01 0x00 0x01 0x00 0x01 0x00 0x01 0x00 0x01 0x00 0x01 0x00 0x01 0x00 0x01 0x00}
+# CHECK-DAG: vr3 = {0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01}
+# CHECK-DAG: vr4 = {0x02 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x02 0x00 0x00 0x00 0x00 0x00 0x00 0x00}
+# CHECK-DAG: vr5 = {0x02 0x00 0x00 0x00 0x02 0x00 0x00 0x00 0x02 0x00 0x00 0x00 0x02 0x00 0x00 0x00}
+# CHECK-DAG: vr6 = {0x02 0x00 0x02 0x00 0x02 0x00 0x02 0x00 0x02 0x00 0x02 0x00 0x02 0x00 0x02 0x00}
+# CHECK-DAG: vr7 = {0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02}
+# CHECK-DAG: vr8 = {0x03 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x03 0x00 0x00 0x00 0x00 0x00 0x00 0x00}
+# CHECK-DAG: vr9 = {0x03 0x00 0x00 0x00 0x03 0x00 0x00 0x00 0x03 0x00 0x00 0x00 0x03 0x00 0x00 0x00}
+# CHECK-DAG: vr10 = {0x03 0x00 0x03 0x00 0x03 0x00 0x03 0x00 0x03 0x00 0x03 0x00 0x03 0x00 0x03 0x00}
+# CHECK-DAG: vr11 = {0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03}
+# CHECK-DAG: vr12 = {0x04 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x04 0x00 0x00 0x00 0x00 0x00 0x00 0x00}
+# CHECK-DAG: vr13 = {0x04 0x00 0x00 0x00 0x04 0x00 0x00 0x00 0x04 0x00 0x00 0x00 0x04 0x00 0x00 0x00}
+# CHECK-DAG: vr14 = {0x04 0x00 0x04 0x00 0x04 0x00 0x04 0x00 0x04 0x00 0x04 0x00 0x04 0x00 0x04 0x00}
+# CHECK-DAG: vr15 = {0x04 0x04 0x04 0x04 0x04 0x04 0x04 0x04 0x04 0x04 0x04 0x04 0x04 0x04 0x04 0x04}
+# CHECK-DAG: vr16 = {0x05 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x05 0x00 0x00 0x00 0x00 0x00 0x00 0x00}
+# CHECK-DAG: vr17 = {0x05 0x00 0x00 0x00 0x05 0x00 0x00 0x00 0x05 0x00 0x00 0x00 0x05 0x00 0x00 0x00}
+# CHECK-DAG: vr18 = {0x05 0x00 0x05 0x00 0x05 0x00 0x05 0x00 0x05 0x00 0x05 0x00 0x05 0x00 0x05 0x00}
+# CHECK-DAG: vr19 = {0x05 0x05 0x05 0x05 0x05 0x05 0x05 0x05 0x05 0x05 0x05 0x05 0x05 0x05 0x05 0x05}
+# CHECK-DAG: vr20 = {0x06 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x06 0x00 0x00 0x00 0x00 0x00 0x00 0x00}
+# CHECK-DAG: vr21 = {0x06 0x00 0x00 0x00 0x06 0x00 0x00 0x00 0x06 0x00 0x00 0x00 0x06 0x00 0x00 0x00}
+# CHECK-DAG: vr22 = {0x06 0x00 0x06 0x00 0x06 0x00 0x06 0x00 0x06 0x00 0x06 0x00 0x06 0x00 0x06 0x00}
+# CHECK-DAG: vr23 = {0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06 0x06}
+# CHECK-DAG: vr24 = {0x07 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x07 0x00 0x00 0x00 0x00 0x00 0x00 0x00}
+# CHECK-DAG: vr25 = {0x07 0x00 0x00 0x00 0x07 0x00 0x00 0x00 0x07 0x00 0x00 0x00 0x07 0x00 0x00 0x00}
+# CHECK-DAG: vr26 = {0x07 0x00 0x07 0x00 0x07 0x00 0x07 0x00 0x07 0x00 0x07 0x00 0x07 0x00 0x07 0x00}
+# CHECK-DAG: vr27 = {0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07 0x07}
+# CHECK-DAG: vr28 = {0x08 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x08 0x00 0x00 0x00 0x00 0x00 0x00 0x00}
+# CHECK-DAG: vr29 = {0x08 0x00 0x00 0x00 0x08 0x00 0x00 0x00 0x08 0x00 0x00 0x00 0x08 0x00 0x00 0x00}
+# CHECK-DAG: vr30 = {0x08 0x00 0x08 0x00 0x08 0x00 0x08 0x00 0x08 0x00 0x08 0x00 0x08 0x00 0x08 0x00}
+# CHECK-DAG: vr31 = {0x08 0x08 0x08 0x08 0x08 0x08 0x08 0x08 0x08 0x08 0x08 0x08 0x08 0x08 0x08 0x08}
diff --git a/lldb/test/Shell/Register/loongarch64-lsx-write.test b/lldb/test/Shell/Register/loongarch64-lsx-write.test
new file mode 100644
index 00000000000000..c715f5542cf9c3
--- /dev/null
+++ b/lldb/test/Shell/Register/loongarch64-lsx-write.test
@@ -0,0 +1,78 @@
+# REQUIRES: native && target-loongarch64 && native-cpu-lsx
+# RUN: %clangxx_host %p/Inputs/loongarch64-lsx-write.cpp -o %t
+# RUN: %lldb -b -s %s %t | FileCheck %s
+process launch
+
+register write vr0 "{0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f}"
+register write vr1 "{0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10}"
+register write vr2 "{0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11}"
+register write vr3 "{0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12}"
+register write vr4 "{0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13}"
+register write vr5 "{0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14}"
+register write vr6 "{0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15}"
+register write vr7 "{0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16}"
+register write vr8 "{0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17}"
+register write vr9 "{0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18}"
+register write vr10 "{0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19}"
+register write vr11 "{0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a}"
+register write vr12 "{0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b}"
+register write vr13 "{0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c}"
+register write vr14 "{0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d}"
+register write vr15 "{0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e}"
+register write vr16 "{0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f}"
+register write vr17 "{0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10}"
+register write vr18 "{0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11}"
+register write vr19 "{0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12}"
+register write vr20 "{0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13}"
+register write vr21 "{0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14}"
+register write vr22 "{0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15}"
+register write vr23 "{0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16}"
+register write vr24 "{0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17}"
+register write vr25 "{0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18}"
+register write vr26 "{0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19}"
+register write vr27 "{0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a}"
+register write vr28 "{0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b}"
+register write vr29 "{0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c}"
+register write vr30 "{0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d}"
+register write vr31 "{0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e}"
+
+## skip `break 5`
+expression $pc=$pc+4
+
+process continue
+# CHECK: process
+
+# CHECK-DAG: vr0 = { 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f }
+# CHECK-DAG: vr1 = { 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 }
+# CHECK-DAG: vr2 = { 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 }
+# CHECK-DAG: vr3 = { 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 }
+# CHECK-DAG: vr4 = { 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 }
+# CHECK-DAG: vr5 = { 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 }
+# CHECK-DAG: vr6 = { 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 }
+# CHECK-DAG: vr7 = { 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 }
+# CHECK-DAG: vr8 = { 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 }
+# CHECK-DAG: vr9 = { 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 }
+# CHECK-DAG: vr10 = { 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 }
+# CHECK-DAG: vr11 = { 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a }
+# CHECK-DAG: vr12 = { 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b }
+# CHECK-DAG: vr13 = { 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c }
+# CHECK-DAG: vr14 = { 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d }
+# CHECK-DAG: vr15 = { 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e }
+# CHECK-DAG: vr16 = { 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f }
+# CHECK-DAG: vr17 = { 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 }
+# CHECK-DAG: vr18 = { 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 }
+# CHECK-DAG: vr19 = { 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 }
+# CHECK-DAG: vr20 = { 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 }
+# CHECK-DAG: vr21 = { 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 }
+# CHECK-DAG: vr22 = { 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 }
+# CHECK-DAG: vr23 = { 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 }
+# CHECK-DAG: vr24 = { 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 }
+# CHECK-DAG: vr25 = { 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 }
+# CHECK-DAG: vr26 = { 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 }
+# CHECK-DAG: vr27 = { 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a }
+# CHECK-DAG: vr28 = { 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b }
+# CHECK-DAG: vr29 = { 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c }
+# CHECK-DAG: vr30 = { 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d }
+# CHECK-DAG: vr31 = { 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e }
+
+# CHECK: Process {{[0-9]+}} exited with status = 0
diff --git a/lldb/utils/lit-cpuid/lit-cpuid.cpp b/lldb/utils/lit-cpuid/lit-cpuid.cpp
index 55f6dfd8ea906e..dc9c2d21474296 100644
--- a/lldb/utils/lit-cpuid/lit-cpuid.cpp
+++ b/lldb/utils/lit-cpuid/lit-cpuid.cpp
@@ -31,6 +31,16 @@ int main(int argc, char **argv) {
if (features.lookup("avx512f"))
outs() << "avx512f\n";
#endif
+#if defined(__loongarch__)
+ const StringMap<bool> features = sys::getHostCPUFeatures();
+ if (features.empty())
+ return 1;
+
+ if (features.lookup("lsx"))
+ outs() << "lsx\n";
+ if (features.lookup("lasx"))
+ outs() << "lasx\n";
+#endif
return 0;
}
diff --git a/llvm/utils/lit/lit/llvm/config.py b/llvm/utils/lit/lit/llvm/config.py
index 5f762ec7f3514a..b2087ee5aeea48 100644
--- a/llvm/utils/lit/lit/llvm/config.py
+++ b/llvm/utils/lit/lit/llvm/config.py
@@ -171,6 +171,8 @@ def __init__(self, lit_config, config):
features.add("target-arm")
if re.match(r'^ppc64le.*-linux', target_triple):
features.add('target=powerpc64le-linux')
+ if re.match(r"^loongarch64.*", target_triple):
+ features.add("target-loongarch64")
if not user_is_root():
features.add("non-root-user")
>From 2fce5331474551255fe35c7ce87eb4704db76d7a Mon Sep 17 00:00:00 2001
From: wanglei <wanglei at loongson.cn>
Date: Fri, 27 Dec 2024 17:21:41 +0800
Subject: [PATCH 3/3] Change NT_LARCH_xxx to NT_LOONGARCH_xxx
Created using spr 1.3.5-bogner
---
.../NativeRegisterContextLinux_loongarch64.cpp | 17 +++++++++--------
1 file changed, 9 insertions(+), 8 deletions(-)
diff --git a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp
index 424a505a3d78e1..21fbf79131bf2f 100644
--- a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp
+++ b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp
@@ -27,12 +27,13 @@
// struct iovec definition
#include <sys/uio.h>
-#ifndef NT_LARCH_LSX
-#define NT_LARCH_LSX 0xa02 /* LoongArch SIMD eXtension registers */
+#ifndef NT_LOONGARCH_LSX
+#define NT_LOONGARCH_LSX 0xa02 /* LoongArch SIMD eXtension registers */
#endif
-#ifndef NT_LARCH_LASX
-#define NT_LARCH_LASX 0xa03 /* LoongArch Advanced SIMD eXtension registers */
+#ifndef NT_LOONGARCH_LASX
+#define NT_LOONGARCH_LASX \
+ 0xa03 /* LoongArch Advanced SIMD eXtension registers */
#endif
#define REG_CONTEXT_SIZE \
@@ -428,7 +429,7 @@ Status NativeRegisterContextLinux_loongarch64::ReadLSX() {
ioVec.iov_base = &m_lsx;
ioVec.iov_len = sizeof(m_lsx);
- error = ReadRegisterSet(&ioVec, sizeof(m_lsx), NT_LARCH_LSX);
+ error = ReadRegisterSet(&ioVec, sizeof(m_lsx), NT_LOONGARCH_LSX);
if (error.Success())
m_lsx_is_valid = true;
@@ -449,7 +450,7 @@ Status NativeRegisterContextLinux_loongarch64::WriteLSX() {
m_lsx_is_valid = false;
m_lasx_is_valid = false;
- return WriteRegisterSet(&ioVec, sizeof(m_lsx), NT_LARCH_LSX);
+ return WriteRegisterSet(&ioVec, sizeof(m_lsx), NT_LOONGARCH_LSX);
}
Status NativeRegisterContextLinux_loongarch64::ReadLASX() {
@@ -462,7 +463,7 @@ Status NativeRegisterContextLinux_loongarch64::ReadLASX() {
ioVec.iov_base = &m_lasx;
ioVec.iov_len = sizeof(m_lasx);
- error = ReadRegisterSet(&ioVec, sizeof(m_lasx), NT_LARCH_LASX);
+ error = ReadRegisterSet(&ioVec, sizeof(m_lasx), NT_LOONGARCH_LASX);
if (error.Success())
m_lasx_is_valid = true;
@@ -483,7 +484,7 @@ Status NativeRegisterContextLinux_loongarch64::WriteLASX() {
m_lsx_is_valid = false;
m_lasx_is_valid = false;
- return WriteRegisterSet(&ioVec, sizeof(m_lsx), NT_LARCH_LASX);
+ return WriteRegisterSet(&ioVec, sizeof(m_lsx), NT_LOONGARCH_LASX);
}
void NativeRegisterContextLinux_loongarch64::InvalidateAllRegisters() {
More information about the llvm-commits
mailing list