[llvm] select v_sat_pk from 2 i16 (PR #121124)

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Wed Dec 25 21:00:20 PST 2024


================
@@ -3298,6 +3298,18 @@ def : GCNPat <
   (v2i16 (V_LSHL_OR_B32_e64 $src1, (i32 16), (i32 (V_AND_B32_e64 (i32 (V_MOV_B32_e32 (i32 0xffff))), $src0))))
 >;
 
+multiclass V_SAT_PK_Pat<Instruction inst> {
+    def: GCNPat<
+        (i16 (conc_lo_u8_i16 (clamp_s16_u8 i16:$lo), (clamp_s16_u8 i16:$hi))),
+        (inst
+            (V_LSHL_OR_B32_e64 VGPR_32:$hi, (S_MOV_B32 (i32 16)),
+            (V_AND_B32_e64 VGPR_32:$lo, (S_MOV_B32 (i32 0xFFFF)))))
----------------
Shoreshen wrote:

The combination of 2 patterns is because there are many ways of taking lower 8 bit of 2 clamped integer into i16

I think it can be continuously added into `conc_lo_u8_i16` if we meet new patterns. I'll update my PR...

https://github.com/llvm/llvm-project/pull/121124


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