[llvm] select v_sat_pk from 2 i16 (PR #121124)

[via llvm-commits]

https://github.com/Shoreshen created https://github.com/llvm/llvm-project/pull/121124

Selecting v_sat_pk instruction based on bit operation. 

>From 7e8c98b635b825cbd94da43a8fd53d86a4254de5 Mon Sep 17 00:00:00 2001
From: shore <372660931 at qq.com>
Date: Thu, 26 Dec 2024 10:00:33 +0800
Subject: [PATCH] select v_sat_pk from 2 i16

---
 llvm/lib/Target/AMDGPU/AMDGPUInstructions.td | 14 ++++++++++++++
 llvm/lib/Target/AMDGPU/SIInstructions.td     | 12 ++++++++++++
 2 files changed, 26 insertions(+)

diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstructions.td b/llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
index 6a5065cd4a0e8f..0a7747b8736786 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
@@ -315,6 +315,20 @@ def srl_16 : PatFrag<
   (ops node:$src0), (srl_oneuse node:$src0, (i32 16))
 >;
 
+def clamp_s16_u8 : PatFrag<
+  (ops node:$src),
+  (i16 (AMDGPUsmed3 $src, (i16 0), (i16 255)))
+>;
+
+def conc_lo_u8_i16 : PatFrags<
+    (ops node:$src0, node:$src1),
+    [
+        (or
+            (and (i16 $src0), (i16 255)),
+            (shl (i16 $src1), (i16 8))
+        )
+    ]
+>;
 
 def hi_i16_elt : PatFrag<
   (ops node:$src0), (i16 (trunc (i32 (srl_16 node:$src0))))
diff --git a/llvm/lib/Target/AMDGPU/SIInstructions.td b/llvm/lib/Target/AMDGPU/SIInstructions.td
index 789ce8815cf801..c0dd87fccfb7bb 100644
--- a/llvm/lib/Target/AMDGPU/SIInstructions.td
+++ b/llvm/lib/Target/AMDGPU/SIInstructions.td
@@ -3298,6 +3298,18 @@ def : GCNPat <
   (v2i16 (V_LSHL_OR_B32_e64 $src1, (i32 16), (i32 (V_AND_B32_e64 (i32 (V_MOV_B32_e32 (i32 0xffff))), $src0))))
 >;
 
+multiclass V_SAT_PK_Pat<Instruction inst> {
+    def: GCNPat<
+        (i16 (conc_lo_u8_i16 (clamp_s16_u8 i16:$lo), (clamp_s16_u8 i16:$hi))),
+        (inst
+            (V_LSHL_OR_B32_e64 VGPR_32:$hi, (S_MOV_B32 (i32 16)),
+            (V_AND_B32_e64 VGPR_32:$lo, (S_MOV_B32 (i32 0xFFFF)))))
+    >;
+}
+
+let OtherPredicates = [NotHasTrue16BitInsts] in 
+defm : V_SAT_PK_Pat<V_SAT_PK_U8_I16_e64>;
+
 // With multiple uses of the shift, this will duplicate the shift and
 // increase register pressure.
 def : GCNPat <