[llvm] [NVPTX] Lower bfloat16 add/mul/sub as fma on SM80 (PR #121065)

[Justin Fargnoli via llvm-commits]

================
@@ -17534,10 +17534,13 @@ template <class MatchContextClass> SDValue DAGCombiner::visitFMA(SDNode *N) {
       return N2;
   }
 
+  const bool PreferFMAAdd = (TLI.isOperationLegal(ISD::FMA, VT) &&
----------------
justinfargnoli wrote:

Does the legality of `ISD::FMA x VT` actually matter? 

https://github.com/llvm/llvm-project/pull/121065