[llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (NFCI) (PR #113903)

[Elvis Wang via llvm-commits]

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@@ -2579,7 +2611,7 @@ class VPInterleaveRecipe : public VPRecipeBase {
 /// A recipe to represent inloop reduction operations, performing a reduction on
 /// a vector operand into a scalar value, and adding the result to a chain.
 /// The Operands are {ChainOp, VecOp, [Condition]}.
-class VPReductionRecipe : public VPSingleDefRecipe {
+class VPReductionRecipe : public VPRecipeWithIRFlags {
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ElvisWang123 wrote:

As your [suggestion](https://github.com/llvm/llvm-project/pull/113903#discussion_r1875680827), the flags of extended/MulAcc reduction should be handled by `VPRecipeWithFlags`.   So the flags can be dropped when needed.
Meanwhile,  extend/MulAcc reduction recipes share lots of function with `VPReductionRecipe`.

But inherit from both `VPRecipeWIthIRFlags` and `VPReductionRecipe` for VPExtended/MulAcc recipes  will lead to multiple inheritance (diamond) of VPRecipeBase. Calling function in `VPRecipeBase` will be ambiguous.

Perhaps we can split off the change of VPReductionReductionRecipe and the unit-test update? 
Or choose  a single class to inherit to prevent multiple inheritance?

https://github.com/llvm/llvm-project/pull/113903