[llvm] Nvptx port LowerBITCAST to SelectionDAG (PR #120903)

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git-clang-format --diff d486b768238c84b3fea8cb35aaceab1ae5204f92 d7cb1339321d41b6f489450f16ea529eac194889 --extensions h,cpp -- llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp llvm/lib/Target/NVPTX/NVPTXISelLowering.h
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diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
index b91530d6f0..8f42877bcb 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
@@ -924,18 +924,19 @@ SDValue DAGTypeLegalizer::LowerBitcast(SDNode *Node) const {
                              Node->getOperand(0), DAG.getIntPtrConstant(0, DL));
   SDValue Vec1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::i8,
                              Node->getOperand(0), DAG.getIntPtrConstant(1, DL));
-  
+
   SDValue Extend0 = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i16, Vec0);
   SDValue Extend1 = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i16, Vec1);
-  
-  EVT ShiftAmtTy = TLI.getShiftAmountTy(Extend1.getValueType(), DAG.getDataLayout());
+
+  EVT ShiftAmtTy =
+      TLI.getShiftAmountTy(Extend1.getValueType(), DAG.getDataLayout());
   SDValue ShiftConst = DAG.getShiftAmountConstant(8, ShiftAmtTy, DL);
   SDValue AsInt = DAG.getNode(
       ISD::OR, DL, MVT::i16, Extend0,
       DAG.getNode(ISD::SHL, DL, Extend1.getValueType(), Extend1, ShiftConst));
   EVT ToVT = Node->getValueType(0);
-  
-  return DAG.getBitcast( ToVT, AsInt);
+
+  return DAG.getBitcast(ToVT, AsInt);
 }
 
 /// Replace the node's results with custom code provided by the target and

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https://github.com/llvm/llvm-project/pull/120903