[llvm] e138f78 - [RISCV] Remove unnecessary 'let BaseInstr' from Xsfvcp pseudoinstructions. NFC

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Fri Dec 20 23:36:51 PST 2024


Author: Craig Topper
Date: 2024-12-20T23:30:40-08:00
New Revision: e138f7831e62054d3971f716273fbe174176deca

URL: https://github.com/llvm/llvm-project/commit/e138f7831e62054d3971f716273fbe174176deca
DIFF: https://github.com/llvm/llvm-project/commit/e138f7831e62054d3971f716273fbe174176deca.diff

LOG: [RISCV] Remove unnecessary 'let BaseInstr' from Xsfvcp pseudoinstructions. NFC

These are identical to the RISCVVPseudo base class.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td b/llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
index 1ad3e1b681466b..20adda91f6bde1 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
@@ -238,7 +238,6 @@ class VPseudoVC_X<Operand OpClass, DAGOperand RS1Class> :
   let HasVLOp = 1;
   let HasSEWOp = 1;
   let hasSideEffects = 0;
-  let BaseInstr = !cast<Instruction>(PseudoToVInst<NAME>.VInst);
 }
 
 class VPseudoVC_XV<Operand OpClass, VReg RS2Class, DAGOperand RS1Class> :
@@ -251,7 +250,6 @@ class VPseudoVC_XV<Operand OpClass, VReg RS2Class, DAGOperand RS1Class> :
   let HasVLOp = 1;
   let HasSEWOp = 1;
   let hasSideEffects = 0;
-  let BaseInstr = !cast<Instruction>(PseudoToVInst<NAME>.VInst);
 }
 
 class VPseudoVC_XVV<Operand OpClass, VReg RDClass, VReg RS2Class,
@@ -265,7 +263,6 @@ class VPseudoVC_XVV<Operand OpClass, VReg RDClass, VReg RS2Class,
   let HasVLOp = 1;
   let HasSEWOp = 1;
   let hasSideEffects = 0;
-  let BaseInstr = !cast<Instruction>(PseudoToVInst<NAME>.VInst);
 }
 
 class VPseudoVC_V_X<Operand OpClass, VReg RDClass, DAGOperand RS1Class> :
@@ -278,7 +275,6 @@ class VPseudoVC_V_X<Operand OpClass, VReg RDClass, DAGOperand RS1Class> :
   let HasVLOp = 1;
   let HasSEWOp = 1;
   let hasSideEffects = 0;
-  let BaseInstr = !cast<Instruction>(PseudoToVInst<NAME>.VInst);
 }
 
 class VPseudoVC_V_XV<Operand OpClass, VReg RDClass, VReg RS2Class,
@@ -292,7 +288,6 @@ class VPseudoVC_V_XV<Operand OpClass, VReg RDClass, VReg RS2Class,
   let HasVLOp = 1;
   let HasSEWOp = 1;
   let hasSideEffects = 0;
-  let BaseInstr = !cast<Instruction>(PseudoToVInst<NAME>.VInst);
 }
 
 class VPseudoVC_V_XVV<Operand OpClass, VReg RDClass, VReg RS2Class,
@@ -307,7 +302,6 @@ class VPseudoVC_V_XVV<Operand OpClass, VReg RDClass, VReg RS2Class,
   let HasSEWOp = 1;
   let hasSideEffects = 0;
   let Constraints = "$rd = $rs3";
-  let BaseInstr = !cast<Instruction>(PseudoToVInst<NAME>.VInst);
 }
 
 multiclass VPseudoVC_X<LMULInfo m, DAGOperand RS1Class,


        


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