[llvm] [AArch64] Prefer SVE2.2 zeroing forms of certain instructions with an all-true predicate (PR #120595)

[via llvm-commits]

https://github.com/SpencerAbson approved this pull request.

I do prefer this, though `SVEAny` is a bit unfortunate!

I was pretty sure this would conflict with https://github.com/llvm/llvm-project/pull/118788, but apparently not.

Cheers!

https://github.com/llvm/llvm-project/pull/120595