[llvm] [VPlan] Impl VPlan-based pattern match for ExtendedRed and MulAccRed (NFCI) (PR #113903)
Florian Hahn via llvm-commits
llvm-commits at lists.llvm.org
Fri Dec 20 04:12:57 PST 2024
================
@@ -2694,6 +2772,201 @@ class VPReductionEVLRecipe : public VPReductionRecipe {
}
};
+/// A recipe to represent inloop extended reduction operations, performing a
+/// reduction on a extended vector operand into a scalar value, and adding the
+/// result to a chain. This recipe is abstract and needs to be lowered to
+/// concrete recipes before codegen. The Operands are {ChainOp, VecOp,
+/// [Condition]}.
+class VPExtendedReductionRecipe : public VPReductionRecipe {
+ Instruction::CastOps ExtOp;
+ DebugLoc RedDL;
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fhahn wrote:
Document please why we need multiple debug locations.
https://github.com/llvm/llvm-project/pull/113903
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