[llvm] [RISCV] Implement RISCVTTIImpl::getPreferredAddressingMode for HasVendorXCVmem (PR #120533)

[Philipp van Kempen via llvm-commits]

================
@@ -0,0 +1,34 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -O3 -mtriple=riscv32 -mattr=+m,+xcvmem -verify-machineinstrs < %s \
+; RUN:   | FileCheck %s --check-prefixes=CHECK
+
+define i32 @test_heuristic(ptr %b, i32 %e, i1 %0) {
----------------
PhilippvK wrote:

I did a rebase and added the test before the commit adding the heuristic. The diffs in the test outputs can be seen here: https://github.com/llvm/llvm-project/pull/120533/commits/342ea51242e39be9b5ec2a76bcfb10298047c1cb#diff-ef5be54f9e88c12d2f5283d2cf71802e3ccdfbe601f89c0e8c2d9eda7c01a986

https://github.com/llvm/llvm-project/pull/120533