[llvm] [RISCV] Implement RISCVTTIImpl::getPreferredAddressingMode for HasVendorXCVmem (PR #120533)

[Pengcheng Wang via llvm-commits]

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@@ -0,0 +1,34 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -O3 -mtriple=riscv32 -mattr=+m,+xcvmem -verify-machineinstrs < %s \
+; RUN:   | FileCheck %s --check-prefixes=CHECK
+
+define i32 @test_heuristic(ptr %b, i32 %e, i1 %0) {
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wangpc-pp wrote:

Please precommit this test so that we can see the diff.

https://github.com/llvm/llvm-project/pull/120533