[llvm] [AMDGPU] Emit S_CBRANCH_SCC for floating-point conditions. (PR #120588)
Jay Foad via llvm-commits
llvm-commits at lists.llvm.org
Thu Dec 19 08:43:26 PST 2024
================
@@ -2390,12 +2390,14 @@ bool AMDGPUDAGToDAGISel::isCBranchSCC(const SDNode *N) const {
return true;
if (VT == MVT::i64) {
- const auto *ST = static_cast<const GCNSubtarget *>(Subtarget);
-
ISD::CondCode CC = cast<CondCodeSDNode>(Cond.getOperand(2))->get();
- return (CC == ISD::SETEQ || CC == ISD::SETNE) && ST->hasScalarCompareEq64();
+ return (CC == ISD::SETEQ || CC == ISD::SETNE) &&
+ Subtarget->hasScalarCompareEq64();
}
+ if ((VT == MVT::f16 || VT == MVT::f32) && ST->hasSALUFloatInsts())
----------------
jayfoad wrote:
```suggestion
if ((VT == MVT::f16 || VT == MVT::f32) && Subtarget->hasSALUFloatInsts())
```
https://github.com/llvm/llvm-project/pull/120588
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