[llvm] [SelectionDAG] Split sd_use_iterator into sd_user_iterator and sd_use_iterator. (PR #120531)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Thu Dec 19 07:38:02 PST 2024
https://github.com/topperc updated https://github.com/llvm/llvm-project/pull/120531
>From 18e19287daefbf6d3e2dd125c77e766d4dab2461 Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Wed, 18 Dec 2024 23:16:31 -0800
Subject: [PATCH 1/2] [SelectionDAG] Split sd_use_iterator into
sd_user_iterator and sd_use_iterator.
sd_use_iterator now returns an SDUse& when dereferenced.
sd_user_iterator returns SDNode*.a
SDNode::use_begin/use_end/uses work on sd_use_iterator.
SDNode::user_begin/user_end/users work on sd_user_iterator.
This allows us to write range based for loops using SDUse& and
SDNode::uses(). I've converted many of these in this patch. I
didn't update loops that have additional variables updated in their
for statement.
Some loops use sd_use_iterator::getOperandNo() which also prevents
using range based for loops. I plan to move this into SDUse in a
follow up patch.
---
llvm/include/llvm/CodeGen/SelectionDAGNodes.h | 81 ++++++++++++++-----
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 39 ++++-----
.../CodeGen/SelectionDAG/LegalizeTypes.cpp | 7 +-
.../SelectionDAG/ScheduleDAGSDNodes.cpp | 2 +-
.../lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 40 +++++----
.../CodeGen/SelectionDAG/SelectionDAGISel.cpp | 4 +-
.../Target/AArch64/AArch64ISelLowering.cpp | 30 +++----
llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 10 ++-
llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 30 ++++---
llvm/lib/Target/ARM/ARMISelLowering.cpp | 33 +++-----
.../Target/Hexagon/HexagonISelDAGToDAG.cpp | 2 +-
llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 25 +++---
llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 45 +++++------
llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp | 2 +-
llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 12 ++-
.../Target/SystemZ/SystemZISelLowering.cpp | 26 +++---
llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 67 +++++++--------
llvm/lib/Target/X86/X86ISelLowering.cpp | 27 ++++---
18 files changed, 248 insertions(+), 234 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/SelectionDAGNodes.h b/llvm/include/llvm/CodeGen/SelectionDAGNodes.h
index 77c04369f3e92d..ff6d4f5f18ed1e 100644
--- a/llvm/include/llvm/CodeGen/SelectionDAGNodes.h
+++ b/llvm/include/llvm/CodeGen/SelectionDAGNodes.h
@@ -750,7 +750,7 @@ END_TWO_BYTE_PACK()
bool use_empty() const { return UseList == nullptr; }
/// Return true if there is exactly one use of this node.
- bool hasOneUse() const { return hasSingleElement(users()); }
+ bool hasOneUse() const { return hasSingleElement(uses()); }
/// Return the number of uses of this node. This method takes
/// time proportional to the number of uses.
@@ -821,14 +821,12 @@ END_TWO_BYTE_PACK()
}
/// Retrieve a pointer to the current user node.
- SDNode *operator*() const {
+ SDUse &operator*() const {
assert(Op && "Cannot dereference end iterator!");
- return Op->getUser();
+ return *Op;
}
- SDNode *operator->() const { return operator*(); }
-
- SDUse &getUse() const { return *Op; }
+ SDUse *operator->() const { return &operator*(); }
/// Retrieve the operand # of this use in its user.
unsigned getOperandNo() const {
@@ -837,6 +835,46 @@ END_TWO_BYTE_PACK()
}
};
+ class user_iterator {
+ friend class SDNode;
+ use_iterator UI;
+
+ explicit user_iterator(SDUse *op) : UI(op) {};
+
+ public:
+ using iterator_category = std::forward_iterator_tag;
+ using value_type = SDNode *;
+ using difference_type = std::ptrdiff_t;
+ using pointer = value_type *;
+ using reference = value_type &;
+
+ user_iterator() = default;
+
+ bool operator==(const user_iterator &x) const { return UI == x.UI; }
+ bool operator!=(const user_iterator &x) const { return !operator==(x); }
+
+ // /// Return true if this iterator is at the end of the uses list.
+ bool atEnd() const { return *this == user_iterator(); }
+
+ user_iterator &operator++() { // Preincrement
+ ++UI;
+ return *this;
+ }
+
+ user_iterator operator++(int) { // Postincrement
+ auto tmp = *this;
+ ++*this;
+ return tmp;
+ }
+
+ // Retrieve a pointer to the current User.
+ SDNode *operator*() const { return UI->getUser(); }
+
+ SDNode *operator->() const { return operator*(); }
+
+ SDUse &getUse() const { return *UI; }
+ };
+
/// Provide iteration support to walk over all uses of an SDNode.
use_iterator use_begin() const {
return use_iterator(UseList);
@@ -844,22 +882,25 @@ END_TWO_BYTE_PACK()
static use_iterator use_end() { return use_iterator(nullptr); }
- /// Provide iteration support to walk over all users of an SDNode.
- /// For now, this should only be used to get a pointer to the first user.
- /// FIXME: Rename use_iterator to user_iterator. Add user_end().
- use_iterator user_begin() const { return use_iterator(UseList); }
-
- // Dereferencing use_iterator returns the user SDNode* making it closer to a
- // user_iterator thus this function is called users() to reflect that.
- // FIXME: Rename to user_iterator and introduce a use_iterator that returns
- // SDUse*.
- inline iterator_range<use_iterator> users() {
+ inline iterator_range<use_iterator> uses() {
return make_range(use_begin(), use_end());
}
- inline iterator_range<use_iterator> users() const {
+ inline iterator_range<use_iterator> uses() const {
return make_range(use_begin(), use_end());
}
+ /// Provide iteration support to walk over all users of an SDNode.
+ user_iterator user_begin() const { return user_iterator(UseList); }
+
+ static user_iterator user_end() { return user_iterator(nullptr); }
+
+ inline iterator_range<user_iterator> users() {
+ return make_range(user_begin(), user_end());
+ }
+ inline iterator_range<user_iterator> users() const {
+ return make_range(user_begin(), user_end());
+ }
+
/// Return true if there are exactly NUSES uses of the indicated value.
/// This method ignores uses of other values defined by this operation.
bool hasNUsesOfValue(unsigned NUses, unsigned Value) const;
@@ -1019,9 +1060,9 @@ END_TWO_BYTE_PACK()
/// If this node has a glue value with a user, return
/// the user (there is at most one). Otherwise return NULL.
SDNode *getGluedUser() const {
- for (use_iterator UI = use_begin(), UE = use_end(); UI != UE; ++UI)
- if (UI.getUse().get().getValueType() == MVT::Glue)
- return *UI;
+ for (SDUse &U : uses())
+ if (U.getValueType() == MVT::Glue)
+ return U.getUser();
return nullptr;
}
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 85009439c37b3a..7a458ff830ab46 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -13229,12 +13229,11 @@ static bool ExtendUsesToFormExtLoad(EVT VT, SDNode *N, SDValue N0,
const TargetLowering &TLI) {
bool HasCopyToRegUses = false;
bool isTruncFree = TLI.isTruncateFree(VT, N0.getValueType());
- for (SDNode::use_iterator UI = N0->use_begin(), UE = N0->use_end(); UI != UE;
- ++UI) {
- SDNode *User = *UI;
+ for (SDUse &Use : N0->uses()) {
+ SDNode *User = Use.getUser();
if (User == N)
continue;
- if (UI.getUse().getResNo() != N0.getResNo())
+ if (Use.getResNo() != N0.getResNo())
continue;
// FIXME: Only extend SETCC N, N and SETCC N, c for now.
if (ExtOpc != ISD::ANY_EXTEND && User->getOpcode() == ISD::SETCC) {
@@ -13266,9 +13265,7 @@ static bool ExtendUsesToFormExtLoad(EVT VT, SDNode *N, SDValue N0,
if (HasCopyToRegUses) {
bool BothLiveOut = false;
- for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
- UI != UE; ++UI) {
- SDUse &Use = UI.getUse();
+ for (SDUse &Use : N->uses()) {
if (Use.getResNo() == 0 && Use.getUser()->getOpcode() == ISD::CopyToReg) {
BothLiveOut = true;
break;
@@ -13780,11 +13777,10 @@ SDValue DAGCombiner::foldSextSetcc(SDNode *N) {
// Non-chain users of this value must either be the setcc in this
// sequence or extends that can be folded into the new {z/s}ext-load.
- for (SDNode::use_iterator UI = V->use_begin(), UE = V->use_end();
- UI != UE; ++UI) {
+ for (SDUse &Use : V->uses()) {
// Skip uses of the chain and the setcc.
- SDNode *User = *UI;
- if (UI.getUse().getResNo() != 0 || User == N0.getNode())
+ SDNode *User = Use.getUser();
+ if (Use.getResNo() != 0 || User == N0.getNode())
continue;
// Extra users must have exactly the same cast we are about to create.
// TODO: This restriction could be eased if ExtendUsesToFormExtLoad()
@@ -18928,7 +18924,7 @@ bool DAGCombiner::CombineToPreIndexedLoadStore(SDNode *N) {
for (SDNode::use_iterator UI = BasePtr->use_begin(),
UE = BasePtr->use_end();
UI != UE; ++UI) {
- SDUse &Use = UI.getUse();
+ SDUse &Use = *UI;
// Skip the use that is Ptr and uses of other results from BasePtr's
// node (important for nodes that return multiple results).
if (Use.getUser() == Ptr.getNode() || Use != BasePtr)
@@ -20056,13 +20052,12 @@ bool DAGCombiner::SliceUpLoad(SDNode *N) {
// Check if this load is used as several smaller chunks of bits.
// Basically, look for uses in trunc or trunc(lshr) and record a new chain
// of computation for each trunc.
- for (SDNode::use_iterator UI = LD->use_begin(), UIEnd = LD->use_end();
- UI != UIEnd; ++UI) {
+ for (SDUse &U : LD->uses()) {
// Skip the uses of the chain.
- if (UI.getUse().getResNo() != 0)
+ if (U.getResNo() != 0)
continue;
- SDNode *User = *UI;
+ SDNode *User = U.getUser();
unsigned Shift = 0;
// Check if this is a trunc(lshr).
@@ -20940,7 +20935,7 @@ DAGCombiner::getStoreMergeCandidates(StoreSDNode *St,
// This must be a chain use.
if (UseIter.getOperandNo() != 0)
return;
- if (auto *OtherStore = dyn_cast<StoreSDNode>(*UseIter)) {
+ if (auto *OtherStore = dyn_cast<StoreSDNode>(UseIter->getUser())) {
BaseIndexOffset Ptr;
int64_t PtrDiff;
if (CandidateMatch(OtherStore, Ptr, PtrDiff) &&
@@ -20958,12 +20953,13 @@ DAGCombiner::getStoreMergeCandidates(StoreSDNode *St,
return nullptr;
for (auto I = RootNode->use_begin(), E = RootNode->use_end();
I != E && NumNodesExplored < MaxSearchNodes; ++I, ++NumNodesExplored) {
- if (I.getOperandNo() == 0 && isa<LoadSDNode>(*I)) { // walk down chain
- for (auto I2 = (*I)->use_begin(), E2 = (*I)->use_end(); I2 != E2; ++I2)
+ SDNode *User = I->getUser();
+ if (I.getOperandNo() == 0 && isa<LoadSDNode>(User)) { // walk down chain
+ for (auto I2 = User->use_begin(), E2 = User->use_end(); I2 != E2; ++I2)
TryToAddCandidate(I2);
}
// Check stores that depend on the root (e.g. Store 3 in the chart above).
- if (I.getOperandNo() == 0 && isa<StoreSDNode>(*I)) {
+ if (I.getOperandNo() == 0 && isa<StoreSDNode>(User)) {
TryToAddCandidate(I);
}
}
@@ -27320,8 +27316,7 @@ SDValue DAGCombiner::visitGET_FPENV_MEM(SDNode *N) {
// Check if the loaded value is used only in a store operation.
StoreSDNode *StNode = nullptr;
- for (auto I = LdNode->use_begin(), E = LdNode->use_end(); I != E; ++I) {
- SDUse &U = I.getUse();
+ for (SDUse &U : LdNode->uses()) {
if (U.getResNo() == 0) {
if (auto *St = dyn_cast<StoreSDNode>(U.getUser())) {
if (StNode)
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
index c7d29ec1a836c1..b6abad830c371e 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
@@ -88,10 +88,9 @@ void DAGTypeLegalizer::PerformExpensiveChecks() {
if (I != ReplacedValues.end()) {
Mapped |= 1;
// Check that remapped values are only used by nodes marked NewNode.
- for (SDNode::use_iterator UI = Node.use_begin(), UE = Node.use_end();
- UI != UE; ++UI)
- if (UI.getUse().getResNo() == i)
- assert(UI->getNodeId() == NewNode &&
+ for (SDUse &U : Node.uses())
+ if (U.getResNo() == i)
+ assert(U.getUser()->getNodeId() == NewNode &&
"Remapped value has non-trivial use!");
// Check that the final result of applying ReplacedValues is not
diff --git a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
index 2e59dbf2f70280..26fc75c0578ec2 100644
--- a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
@@ -236,7 +236,7 @@ void ScheduleDAGSDNodes::ClusterNeighboringLoads(SDNode *Node) {
// This algorithm requires a reasonably low use count before finding a match
// to avoid uselessly blowing up compile time in large blocks.
unsigned UseCount = 0;
- for (SDNode::use_iterator I = Chain->use_begin(), E = Chain->use_end();
+ for (SDNode::user_iterator I = Chain->user_begin(), E = Chain->user_end();
I != E && UseCount < 100; ++I, ++UseCount) {
if (I.getUse().getResNo() != Chain.getResNo())
continue;
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index bd9e5d4dce8ec6..07749ec87d0b20 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -11611,7 +11611,7 @@ class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
void NodeDeleted(SDNode *N, SDNode *E) override {
// Increment the iterator as needed.
- while (UI != UE && N == *UI)
+ while (UI != UE && N == UI->getUser())
++UI;
}
@@ -11650,7 +11650,7 @@ void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To) {
SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
RAUWUpdateListener Listener(*this, UI, UE);
while (UI != UE) {
- SDNode *User = *UI;
+ SDNode *User = UI->getUser();
// This node is about to morph, remove its old self from the CSE maps.
RemoveNodeFromCSEMaps(User);
@@ -11660,12 +11660,12 @@ void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To) {
// To help reduce the number of CSE recomputations, process all
// the uses of this user that we can find this way.
do {
- SDUse &Use = UI.getUse();
+ SDUse &Use = *UI;
++UI;
Use.set(To);
if (To->isDivergent() != From->isDivergent())
updateDivergence(User);
- } while (UI != UE && *UI == User);
+ } while (UI != UE && UI->getUser() == User);
// Now that we have modified User, add it back to the CSE maps. If it
// already exists there, recursively merge the results together.
AddModifiedNodeToCSEMaps(User);
@@ -11708,7 +11708,7 @@ void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To) {
SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
RAUWUpdateListener Listener(*this, UI, UE);
while (UI != UE) {
- SDNode *User = *UI;
+ SDNode *User = UI->getUser();
// This node is about to morph, remove its old self from the CSE maps.
RemoveNodeFromCSEMaps(User);
@@ -11718,12 +11718,12 @@ void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To) {
// To help reduce the number of CSE recomputations, process all
// the uses of this user that we can find this way.
do {
- SDUse &Use = UI.getUse();
+ SDUse &Use = *UI;
++UI;
Use.setNode(To);
if (To->isDivergent() != From->isDivergent())
updateDivergence(User);
- } while (UI != UE && *UI == User);
+ } while (UI != UE && UI->getUser() == User);
// Now that we have modified User, add it back to the CSE maps. If it
// already exists there, recursively merge the results together.
@@ -11756,7 +11756,7 @@ void SelectionDAG::ReplaceAllUsesWith(SDNode *From, const SDValue *To) {
SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
RAUWUpdateListener Listener(*this, UI, UE);
while (UI != UE) {
- SDNode *User = *UI;
+ SDNode *User = UI->getUser();
// This node is about to morph, remove its old self from the CSE maps.
RemoveNodeFromCSEMaps(User);
@@ -11767,12 +11767,12 @@ void SelectionDAG::ReplaceAllUsesWith(SDNode *From, const SDValue *To) {
// user that we can find this way.
bool To_IsDivergent = false;
do {
- SDUse &Use = UI.getUse();
+ SDUse &Use = *UI;
const SDValue &ToOp = To[Use.getResNo()];
++UI;
Use.set(ToOp);
To_IsDivergent |= ToOp->isDivergent();
- } while (UI != UE && *UI == User);
+ } while (UI != UE && UI->getUser() == User);
if (To_IsDivergent != From->isDivergent())
updateDivergence(User);
@@ -11810,7 +11810,7 @@ void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To){
UE = From.getNode()->use_end();
RAUWUpdateListener Listener(*this, UI, UE);
while (UI != UE) {
- SDNode *User = *UI;
+ SDNode *User = UI->getUser();
bool UserRemovedFromCSEMaps = false;
// A user can appear in a use list multiple times, and when this
@@ -11818,7 +11818,7 @@ void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To){
// To help reduce the number of CSE recomputations, process all
// the uses of this user that we can find this way.
do {
- SDUse &Use = UI.getUse();
+ SDUse &Use = *UI;
// Skip uses of different values from the same node.
if (Use.getResNo() != From.getResNo()) {
@@ -11837,7 +11837,7 @@ void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To){
Use.set(To);
if (To->isDivergent() != From->isDivergent())
updateDivergence(User);
- } while (UI != UE && *UI == User);
+ } while (UI != UE && UI->getUser() == User);
// We are iterating over all uses of the From node, so if a use
// doesn't use the specific value, no changes are made.
if (!UserRemovedFromCSEMaps)
@@ -11982,11 +11982,9 @@ void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
for (unsigned i = 0; i != Num; ++i) {
unsigned FromResNo = From[i].getResNo();
SDNode *FromNode = From[i].getNode();
- for (SDNode::use_iterator UI = FromNode->use_begin(),
- E = FromNode->use_end(); UI != E; ++UI) {
- SDUse &Use = UI.getUse();
+ for (SDUse &Use : FromNode->uses()) {
if (Use.getResNo() == FromResNo) {
- UseMemo Memo = { *UI, i, &Use };
+ UseMemo Memo = {Use.getUser(), i, &Use};
Uses.push_back(Memo);
}
}
@@ -12462,8 +12460,8 @@ bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
assert(Value < getNumValues() && "Bad value!");
// TODO: Only iterate over uses of a given value of the node
- for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
- if (UI.getUse().getResNo() == Value) {
+ for (SDUse &U : uses()) {
+ if (U.getResNo() == Value) {
if (NUses == 0)
return false;
--NUses;
@@ -12479,8 +12477,8 @@ bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
bool SDNode::hasAnyUseOfValue(unsigned Value) const {
assert(Value < getNumValues() && "Bad value!");
- for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
- if (UI.getUse().getResNo() == Value)
+ for (SDUse &U : uses())
+ if (U.getResNo() == Value)
return true;
return false;
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index c4d0552ad55d39..c1dabe05452fb9 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -3792,8 +3792,8 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
for (unsigned i = 1, e = NodeStack.size()-1; i != e; ++i) {
unsigned NNonChainUses = 0;
SDNode *NS = NodeStack[i].getNode();
- for (auto UI = NS->use_begin(), UE = NS->use_end(); UI != UE; ++UI)
- if (UI.getUse().getValueType() != MVT::Other)
+ for (const SDUse &U : NS->uses())
+ if (U.getValueType() != MVT::Other)
if (++NNonChainUses > 1) {
HasMultipleUses = true;
break;
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index 494506def33a35..257cb716bae430 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -23390,11 +23390,10 @@ static SDValue performPostLD1Combine(SDNode *N,
// Check if there are other uses. If so, do not combine as it will introduce
// an extra load.
- for (SDNode::use_iterator UI = LD->use_begin(), UE = LD->use_end(); UI != UE;
- ++UI) {
- if (UI.getUse().getResNo() == 1) // Ignore uses of the chain result.
+ for (SDUse &U : LD->uses()) {
+ if (U.getResNo() == 1) // Ignore uses of the chain result.
continue;
- if (*UI != N)
+ if (U.getUser() != N)
return SDValue();
}
@@ -23410,11 +23409,9 @@ static SDValue performPostLD1Combine(SDNode *N,
SDValue Addr = LD->getOperand(1);
SDValue Vector = N->getOperand(0);
// Search for a use of the address operand that is an increment.
- for (SDNode::use_iterator UI = Addr.getNode()->use_begin(), UE =
- Addr.getNode()->use_end(); UI != UE; ++UI) {
- SDNode *User = *UI;
- if (User->getOpcode() != ISD::ADD
- || UI.getUse().getResNo() != Addr.getResNo())
+ for (SDUse &Use : Addr->uses()) {
+ SDNode *User = Use.getUser();
+ if (User->getOpcode() != ISD::ADD || Use.getResNo() != Addr.getResNo())
continue;
// If the increment is a constant, it must match the memory ref size.
@@ -24128,11 +24125,9 @@ static SDValue performNEONPostLDSTCombine(SDNode *N,
SDValue Addr = N->getOperand(AddrOpIdx);
// Search for a use of the address operand that is an increment.
- for (SDNode::use_iterator UI = Addr.getNode()->use_begin(),
- UE = Addr.getNode()->use_end(); UI != UE; ++UI) {
- SDNode *User = *UI;
- if (User->getOpcode() != ISD::ADD ||
- UI.getUse().getResNo() != Addr.getResNo())
+ for (SDUse &Use : Addr->uses()) {
+ SDNode *User = Use.getUser();
+ if (User->getOpcode() != ISD::ADD || Use.getResNo() != Addr.getResNo())
continue;
// Check that the add is independent of the load/store. Otherwise, folding
@@ -26604,12 +26599,11 @@ bool AArch64TargetLowering::getIndexedAddressParts(SDNode *N, SDNode *Op,
// Non-null if there is exactly one user of the loaded value (ignoring chain).
SDNode *ValOnlyUser = nullptr;
- for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); UI != UE;
- ++UI) {
- if (UI.getUse().getResNo() == 1)
+ for (SDUse &U : N->uses()) {
+ if (U.getResNo() == 1)
continue; // Ignore chain.
if (ValOnlyUser == nullptr)
- ValOnlyUser = *UI;
+ ValOnlyUser = U.getUser();
else {
ValOnlyUser = nullptr; // Multiple non-chain uses, bail out.
break;
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
index c0e01a020e0eb9..756b6129a2f574 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
@@ -933,7 +933,7 @@ void AMDGPUDAGToDAGISel::SelectUADDO_USUBO(SDNode *N) {
bool IsAdd = N->getOpcode() == ISD::UADDO;
bool IsVALU = N->isDivergent();
- for (SDNode::use_iterator UI = N->use_begin(), E = N->use_end(); UI != E;
+ for (SDNode::user_iterator UI = N->user_begin(), E = N->user_end(); UI != E;
++UI)
if (UI.getUse().getResNo() == 1) {
if ((IsAdd && (UI->getOpcode() != ISD::UADDO_CARRY)) ||
@@ -3756,7 +3756,8 @@ bool AMDGPUDAGToDAGISel::isVGPRImm(const SDNode * N) const {
bool AllUsesAcceptSReg = true;
for (SDNode::use_iterator U = N->use_begin(), E = SDNode::use_end();
Limit < 10 && U != E; ++U, ++Limit) {
- const TargetRegisterClass *RC = getOperandRegClass(*U, U.getOperandNo());
+ const TargetRegisterClass *RC =
+ getOperandRegClass(U->getUser(), U.getOperandNo());
// If the register class is unknown, it could be an unknown
// register class that needs to be an SGPR, e.g. an inline asm
@@ -3766,7 +3767,7 @@ bool AMDGPUDAGToDAGISel::isVGPRImm(const SDNode * N) const {
if (RC != &AMDGPU::VS_32RegClass && RC != &AMDGPU::VS_64RegClass) {
AllUsesAcceptSReg = false;
- SDNode * User = *U;
+ SDNode *User = U->getUser();
if (User->isMachineOpcode()) {
unsigned Opc = User->getMachineOpcode();
const MCInstrDesc &Desc = SII->get(Opc);
@@ -3775,7 +3776,8 @@ bool AMDGPUDAGToDAGISel::isVGPRImm(const SDNode * N) const {
unsigned CommuteIdx1 = TargetInstrInfo::CommuteAnyOperandIndex;
if (SII->findCommutedOpIndices(Desc, OpIdx, CommuteIdx1)) {
unsigned CommutedOpNo = CommuteIdx1 - Desc.getNumDefs();
- const TargetRegisterClass *CommutedRC = getOperandRegClass(*U, CommutedOpNo);
+ const TargetRegisterClass *CommutedRC =
+ getOperandRegClass(U->getUser(), CommutedOpNo);
if (CommutedRC == &AMDGPU::VS_32RegClass ||
CommutedRC == &AMDGPU::VS_64RegClass)
AllUsesAcceptSReg = true;
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index f83ccf6d8280b3..3423ea18185794 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -6566,15 +6566,12 @@ void SITargetLowering::ReplaceNodeResults(SDNode *N,
/// Helper function for LowerBRCOND
static SDNode *findUser(SDValue Value, unsigned Opcode) {
- SDNode *Parent = Value.getNode();
- for (SDNode::use_iterator I = Parent->use_begin(), E = Parent->use_end();
- I != E; ++I) {
-
- if (I.getUse().get() != Value)
+ for (SDUse &U : Value->uses()) {
+ if (U.get() != Value)
continue;
- if (I->getOpcode() == Opcode)
- return *I;
+ if (U.getUser()->getOpcode() == Opcode)
+ return U.getUser();
}
return nullptr;
}
@@ -15142,29 +15139,30 @@ SDNode *SITargetLowering::adjustWritemask(MachineSDNode *&Node,
}
// Try to figure out the used register components
- for (SDNode::use_iterator I = Node->use_begin(), E = Node->use_end(); I != E;
- ++I) {
+ for (SDUse &Use : Node->uses()) {
// Don't look at users of the chain.
- if (I.getUse().getResNo() != 0)
+ if (Use.getResNo() != 0)
continue;
+ SDNode *User = Use.getUser();
+
// Abort if we can't understand the usage
- if (!I->isMachineOpcode() ||
- I->getMachineOpcode() != TargetOpcode::EXTRACT_SUBREG)
+ if (!User->isMachineOpcode() ||
+ User->getMachineOpcode() != TargetOpcode::EXTRACT_SUBREG)
return Node;
// Lane means which subreg of %vgpra_vgprb_vgprc_vgprd is used.
// Note that subregs are packed, i.e. Lane==0 is the first bit set
// in OldDmask, so it can be any of X,Y,Z,W; Lane==1 is the second bit
// set, etc.
- Lane = SubIdx2Lane(I->getConstantOperandVal(1));
+ Lane = SubIdx2Lane(User->getConstantOperandVal(1));
if (Lane == ~0u)
return Node;
// Check if the use is for the TFE/LWE generated result at VGPRn+1.
if (UsesTFC && Lane == TFCLane) {
- Users[Lane] = *I;
+ Users[Lane] = User;
} else {
// Set which texture component corresponds to the lane.
unsigned Comp;
@@ -15177,7 +15175,7 @@ SDNode *SITargetLowering::adjustWritemask(MachineSDNode *&Node,
if (Users[Lane])
return Node;
- Users[Lane] = *I;
+ Users[Lane] = User;
NewDmask |= 1 << Comp;
}
}
@@ -16878,7 +16876,7 @@ bool SITargetLowering::requiresUniformRegister(MachineFunction &MF,
bool SITargetLowering::hasMemSDNodeUser(SDNode *N) const {
SDNode::use_iterator I = N->use_begin(), E = N->use_end();
for (; I != E; ++I) {
- if (MemSDNode *M = dyn_cast<MemSDNode>(*I)) {
+ if (MemSDNode *M = dyn_cast<MemSDNode>(I->getUser())) {
if (getBasePtrIndex(M) == I.getOperandNo())
return true;
}
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index 88293c1b1101ac..cfb5505512a087 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -16202,9 +16202,8 @@ static SDValue CombineBaseUpdate(SDNode *N,
// Search for a use of the address operand that is an increment.
for (SDNode::use_iterator UI = Addr.getNode()->use_begin(),
UE = Addr.getNode()->use_end(); UI != UE; ++UI) {
- SDNode *User = *UI;
- if (UI.getUse().getResNo() != Addr.getResNo() ||
- User->getNumOperands() != 2)
+ SDNode *User = UI->getUser();
+ if (UI->getResNo() != Addr.getResNo() || User->getNumOperands() != 2)
continue;
SDValue Inc = User->getOperand(UI.getOperandNo() == 1 ? 0 : 1);
@@ -16225,8 +16224,8 @@ static SDValue CombineBaseUpdate(SDNode *N,
for (SDNode::use_iterator UI = Base->use_begin(), UE = Base->use_end();
UI != UE; ++UI) {
- SDNode *User = *UI;
- if (UI.getUse().getResNo() != Base.getResNo() || User == Addr.getNode() ||
+ SDNode *User = UI->getUser();
+ if (UI->getResNo() != Base.getResNo() || User == Addr.getNode() ||
User->getNumOperands() != 2)
continue;
@@ -16303,12 +16302,9 @@ static SDValue PerformMVEVLDCombine(SDNode *N,
return SDValue();
// Search for a use of the address operand that is an increment.
- for (SDNode::use_iterator UI = Addr.getNode()->use_begin(),
- UE = Addr.getNode()->use_end();
- UI != UE; ++UI) {
- SDNode *User = *UI;
- if (User->getOpcode() != ISD::ADD ||
- UI.getUse().getResNo() != Addr.getResNo())
+ for (SDUse &Use : Addr->uses()) {
+ SDNode *User = Use.getUser();
+ if (User->getOpcode() != ISD::ADD || Use.getResNo() != Addr.getResNo())
continue;
// Check that the add is independent of the load/store. Otherwise, folding
@@ -16438,12 +16434,11 @@ static bool CombineVLDDUP(SDNode *N, TargetLowering::DAGCombinerInfo &DCI) {
// First check that all the vldN-lane uses are VDUPLANEs and that the lane
// numbers match the load.
unsigned VLDLaneNo = VLD->getConstantOperandVal(NumVecs + 3);
- for (SDNode::use_iterator UI = VLD->use_begin(), UE = VLD->use_end();
- UI != UE; ++UI) {
+ for (SDUse &Use : VLD->uses()) {
// Ignore uses of the chain result.
- if (UI.getUse().getResNo() == NumVecs)
+ if (Use.getResNo() == NumVecs)
continue;
- SDNode *User = *UI;
+ SDNode *User = Use.getUser();
if (User->getOpcode() != ARMISD::VDUPLANE ||
VLDLaneNo != User->getConstantOperandVal(1))
return false;
@@ -16463,14 +16458,12 @@ static bool CombineVLDDUP(SDNode *N, TargetLowering::DAGCombinerInfo &DCI) {
VLDMemInt->getMemOperand());
// Update the uses.
- for (SDNode::use_iterator UI = VLD->use_begin(), UE = VLD->use_end();
- UI != UE; ++UI) {
- unsigned ResNo = UI.getUse().getResNo();
+ for (SDUse &Use : VLD->uses()) {
+ unsigned ResNo = Use.getResNo();
// Ignore uses of the chain result.
if (ResNo == NumVecs)
continue;
- SDNode *User = *UI;
- DCI.CombineTo(User, SDValue(VLDDup.getNode(), ResNo));
+ DCI.CombineTo(Use.getUser(), SDValue(VLDDup.getNode(), ResNo));
}
// Now the vldN-lane intrinsic is dead except for its chain result.
diff --git a/llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp b/llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
index 2a267e52610b34..43ca5456ee3e2e 100644
--- a/llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
@@ -1303,7 +1303,7 @@ void HexagonDAGToDAGISel::ppHoistZextI1(std::vector<SDNode*> &&Nodes) {
if (!OpVT.isSimple() || OpVT.getSimpleVT() != MVT::i1)
continue;
for (auto I = N->use_begin(), E = N->use_end(); I != E; ++I) {
- SDNode *U = *I;
+ SDNode *U = I->getUser();
if (U->getNumValues() != 1)
continue;
EVT UVT = U->getValueType(0);
diff --git a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
index 5445a0a06bef10..4fe8383557b327 100644
--- a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
@@ -954,24 +954,25 @@ static unsigned allUsesTruncate(SelectionDAG *CurDAG, SDNode *N) {
// Cannot use range-based for loop here as we need the actual use (i.e. we
// need the operand number corresponding to the use). A range-based for
// will unbox the use and provide an SDNode*.
- for (SDNode::use_iterator Use = N->use_begin(), UseEnd = N->use_end();
- Use != UseEnd; ++Use) {
+ for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); UI != UE;
+ ++UI) {
+ SDNode *User = UI->getUser();
unsigned Opc =
- Use->isMachineOpcode() ? Use->getMachineOpcode() : Use->getOpcode();
+ User->isMachineOpcode() ? User->getMachineOpcode() : User->getOpcode();
switch (Opc) {
default: return 0;
case ISD::TRUNCATE:
- if (Use->isMachineOpcode())
+ if (User->isMachineOpcode())
return 0;
- MaxTruncation =
- std::max(MaxTruncation, (unsigned)Use->getValueType(0).getSizeInBits());
+ MaxTruncation = std::max(MaxTruncation,
+ (unsigned)User->getValueType(0).getSizeInBits());
continue;
case ISD::STORE: {
- if (Use->isMachineOpcode())
+ if (User->isMachineOpcode())
return 0;
- StoreSDNode *STN = cast<StoreSDNode>(*Use);
+ StoreSDNode *STN = cast<StoreSDNode>(User);
unsigned MemVTSize = STN->getMemoryVT().getSizeInBits();
- if (MemVTSize == 64 || Use.getOperandNo() != 0)
+ if (MemVTSize == 64 || UI.getOperandNo() != 0)
return 0;
MaxTruncation = std::max(MaxTruncation, MemVTSize);
continue;
@@ -980,7 +981,7 @@ static unsigned allUsesTruncate(SelectionDAG *CurDAG, SDNode *N) {
case PPC::STWX8:
case PPC::STWU8:
case PPC::STWUX8:
- if (Use.getOperandNo() != 0)
+ if (UI.getOperandNo() != 0)
return 0;
MaxTruncation = std::max(MaxTruncation, 32u);
continue;
@@ -988,7 +989,7 @@ static unsigned allUsesTruncate(SelectionDAG *CurDAG, SDNode *N) {
case PPC::STHX8:
case PPC::STHU8:
case PPC::STHUX8:
- if (Use.getOperandNo() != 0)
+ if (UI.getOperandNo() != 0)
return 0;
MaxTruncation = std::max(MaxTruncation, 16u);
continue;
@@ -996,7 +997,7 @@ static unsigned allUsesTruncate(SelectionDAG *CurDAG, SDNode *N) {
case PPC::STBX8:
case PPC::STBU8:
case PPC::STBUX8:
- if (Use.getOperandNo() != 0)
+ if (UI.getOperandNo() != 0)
return 0;
MaxTruncation = std::max(MaxTruncation, 8u);
continue;
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index 3b3842bb144563..691107abf3e890 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -3049,11 +3049,10 @@ static bool usePartialVectorLoads(SDNode *N, const PPCSubtarget& ST) {
if (!LoadedVal.hasOneUse())
return false;
- for (SDNode::use_iterator UI = LD->use_begin(), UE = LD->use_end();
- UI != UE; ++UI)
- if (UI.getUse().get().getResNo() == 0 &&
- UI->getOpcode() != ISD::SCALAR_TO_VECTOR &&
- UI->getOpcode() != PPCISD::SCALAR_TO_VECTOR_PERMUTED)
+ for (SDUse &Use : LD->uses())
+ if (Use.getResNo() == 0 &&
+ Use.getUser()->getOpcode() != ISD::SCALAR_TO_VECTOR &&
+ Use.getUser()->getOpcode() != PPCISD::SCALAR_TO_VECTOR_PERMUTED)
return false;
return true;
@@ -8684,18 +8683,17 @@ bool PPCTargetLowering::directMoveIsProfitable(const SDValue &Op) const {
(!MMO->getSize().hasValue() || MMO->getSize().getValue() <= 2))
return true;
- for (SDNode::use_iterator UI = Origin->use_begin(),
- UE = Origin->use_end();
- UI != UE; ++UI) {
+ for (SDUse &Use : Origin->uses()) {
// Only look at the users of the loaded value.
- if (UI.getUse().get().getResNo() != 0)
+ if (Use.getResNo() != 0)
continue;
- if (UI->getOpcode() != ISD::SINT_TO_FP &&
- UI->getOpcode() != ISD::UINT_TO_FP &&
- UI->getOpcode() != ISD::STRICT_SINT_TO_FP &&
- UI->getOpcode() != ISD::STRICT_UINT_TO_FP)
+ SDNode *User = Use.getUser();
+ if (User->getOpcode() != ISD::SINT_TO_FP &&
+ User->getOpcode() != ISD::UINT_TO_FP &&
+ User->getOpcode() != ISD::STRICT_SINT_TO_FP &&
+ User->getOpcode() != ISD::STRICT_UINT_TO_FP)
return true;
}
@@ -16081,9 +16079,9 @@ SDValue PPCTargetLowering::combineVReverseMemOP(ShuffleVectorSDNode *SVN,
// If the load return value 0 has more than one user except the
// shufflevector instruction, it is not profitable to replace the
// shufflevector with a reverse load.
- for (SDNode::use_iterator UI = LSBase->use_begin(), UE = LSBase->use_end();
- UI != UE; ++UI)
- if (UI.getUse().getResNo() == 0 && UI->getOpcode() != ISD::VECTOR_SHUFFLE)
+ for (SDUse &Use : LSBase->uses())
+ if (Use.getResNo() == 0 &&
+ Use.getUser()->getOpcode() != ISD::VECTOR_SHUFFLE)
return SDValue();
SDLoc dl(LSBase);
@@ -16755,13 +16753,12 @@ SDValue PPCTargetLowering::PerformDAGCombine(SDNode *N,
SDNode *VCMPrecNode = nullptr;
SDNode *LHSN = N->getOperand(0).getNode();
- for (SDNode::use_iterator UI = LHSN->use_begin(), E = LHSN->use_end();
- UI != E; ++UI)
- if (UI->getOpcode() == PPCISD::VCMP_rec &&
- UI->getOperand(1) == N->getOperand(1) &&
- UI->getOperand(2) == N->getOperand(2) &&
- UI->getOperand(0) == N->getOperand(0)) {
- VCMPrecNode = *UI;
+ for (SDNode *User : LHSN->users())
+ if (User->getOpcode() == PPCISD::VCMP_rec &&
+ User->getOperand(1) == N->getOperand(1) &&
+ User->getOperand(2) == N->getOperand(2) &&
+ User->getOperand(0) == N->getOperand(0)) {
+ VCMPrecNode = User;
break;
}
@@ -16777,7 +16774,7 @@ SDValue PPCTargetLowering::PerformDAGCombine(SDNode *N,
for (SDNode::use_iterator UI = VCMPrecNode->use_begin();
FlagUser == nullptr; ++UI) {
assert(UI != VCMPrecNode->use_end() && "Didn't find user!");
- SDNode *User = *UI;
+ SDNode *User = UI->getUser();
for (unsigned i = 0, e = User->getNumOperands(); i != e; ++i) {
if (User->getOperand(i) == SDValue(VCMPrecNode, 1)) {
FlagUser = User;
diff --git a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
index 4393d33021760d..dc45108e55e20a 100644
--- a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
@@ -3294,7 +3294,7 @@ bool RISCVDAGToDAGISel::hasAllNBitUsers(SDNode *Node, unsigned Bits,
return false;
for (auto UI = Node->use_begin(), UE = Node->use_end(); UI != UE; ++UI) {
- SDNode *User = *UI;
+ SDNode *User = UI->getUser();
// Users of this node should have already been instruction selected
if (!User->isMachineOpcode())
return false;
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index f0afd26598d6d6..01ef101ff8947a 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -15691,14 +15691,14 @@ static SDValue combineOp_VLToVWOp_VL(SDNode *N,
for (SDNode::use_iterator UI = Op.OrigOperand->use_begin(),
UE = Op.OrigOperand->use_end();
UI != UE; ++UI) {
- SDNode *TheUse = *UI;
- if (!NodeExtensionHelper::isSupportedRoot(TheUse, Subtarget))
+ SDNode *TheUser = UI->getUser();
+ if (!NodeExtensionHelper::isSupportedRoot(TheUser, Subtarget))
return false;
// We only support the first 2 operands of FMA.
if (UI.getOperandNo() >= 2)
return false;
- if (Inserted.insert(TheUse).second)
- Worklist.push_back(TheUse);
+ if (Inserted.insert(TheUser).second)
+ Worklist.push_back(TheUser);
}
}
return true;
@@ -15916,9 +15916,7 @@ static SDValue performMemPairCombine(SDNode *N,
auto [Base1, Offset1] = ExtractBaseAndOffset(LSNode1->getOperand(OpNum));
SDValue Chain = N->getOperand(0);
- for (SDNode::use_iterator UI = Chain->use_begin(), UE = Chain->use_end();
- UI != UE; ++UI) {
- SDUse &Use = UI.getUse();
+ for (SDUse &Use : Chain->uses()) {
if (Use.getUser() != N && Use.getResNo() == 0 &&
Use.getUser()->getOpcode() == N->getOpcode()) {
LSBaseSDNode *LSNode2 = cast<LSBaseSDNode>(Use.getUser());
diff --git a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
index 331d3a4d494c98..d664b4a41fce77 100644
--- a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
@@ -7105,14 +7105,13 @@ static bool isI128MovedToParts(LoadSDNode *LD, SDNode *&LoPart,
LoPart = HiPart = nullptr;
// Scan through all users.
- for (SDNode::use_iterator UI = LD->use_begin(), UIEnd = LD->use_end();
- UI != UIEnd; ++UI) {
+ for (SDUse &Use : LD->uses()) {
// Skip the uses of the chain.
- if (UI.getUse().getResNo() != 0)
+ if (Use.getResNo() != 0)
continue;
// Verify every user is a TRUNCATE to i64 of the low or high half.
- SDNode *User = *UI;
+ SDNode *User = Use.getUser();
bool IsLoPart = true;
if (User->getOpcode() == ISD::SRL &&
User->getOperand(1).getOpcode() == ISD::Constant &&
@@ -7141,14 +7140,13 @@ static bool isF128MovedToParts(LoadSDNode *LD, SDNode *&LoPart,
LoPart = HiPart = nullptr;
// Scan through all users.
- for (SDNode::use_iterator UI = LD->use_begin(), UIEnd = LD->use_end();
- UI != UIEnd; ++UI) {
+ for (SDUse &Use : LD->uses()) {
// Skip the uses of the chain.
- if (UI.getUse().getResNo() != 0)
+ if (Use.getResNo() != 0)
continue;
// Verify every user is an EXTRACT_SUBREG of the low or high half.
- SDNode *User = *UI;
+ SDNode *User = Use.getUser();
if (!User->hasOneUse() || !User->isMachineOpcode() ||
User->getMachineOpcode() != TargetOpcode::EXTRACT_SUBREG)
return false;
@@ -7238,15 +7236,13 @@ SDValue SystemZTargetLowering::combineLOAD(
SDValue Replicate;
SmallVector<SDNode*, 8> OtherUses;
- for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
- UI != UE; ++UI) {
- if (UI->getOpcode() == SystemZISD::REPLICATE) {
+ for (SDUse &Use : N->uses()) {
+ if (Use.getUser()->getOpcode() == SystemZISD::REPLICATE) {
if (Replicate)
return SDValue(); // Should never happen
- Replicate = SDValue(*UI, 0);
- }
- else if (UI.getUse().getResNo() == 0)
- OtherUses.push_back(*UI);
+ Replicate = SDValue(Use.getUser(), 0);
+ } else if (Use.getResNo() == 0)
+ OtherUses.push_back(Use.getUser());
}
if (!Replicate || OtherUses.empty())
return SDValue();
diff --git a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
index bb20e6ecf281b0..9b340a778b36ad 100644
--- a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
+++ b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -3318,24 +3318,25 @@ X86::CondCode X86DAGToDAGISel::getCondFromNode(SDNode *N) const {
/// other than ZF.
bool X86DAGToDAGISel::onlyUsesZeroFlag(SDValue Flags) const {
// Examine each user of the node.
- for (SDNode::use_iterator UI = Flags->use_begin(), UE = Flags->use_end();
- UI != UE; ++UI) {
+ for (SDUse &Use : Flags->uses()) {
// Only check things that use the flags.
- if (UI.getUse().getResNo() != Flags.getResNo())
+ if (Use.getResNo() != Flags.getResNo())
continue;
+ SDNode *User = Use.getUser();
// Only examine CopyToReg uses that copy to EFLAGS.
- if (UI->getOpcode() != ISD::CopyToReg ||
- cast<RegisterSDNode>(UI->getOperand(1))->getReg() != X86::EFLAGS)
+ if (User->getOpcode() != ISD::CopyToReg ||
+ cast<RegisterSDNode>(User->getOperand(1))->getReg() != X86::EFLAGS)
return false;
// Examine each user of the CopyToReg use.
- for (SDNode::use_iterator FlagUI = UI->use_begin(),
- FlagUE = UI->use_end(); FlagUI != FlagUE; ++FlagUI) {
+ for (SDUse &FlagUse : User->uses()) {
// Only examine the Flag result.
- if (FlagUI.getUse().getResNo() != 1) continue;
+ if (FlagUse.getResNo() != 1)
+ continue;
// Anything unusual: assume conservatively.
- if (!FlagUI->isMachineOpcode()) return false;
+ if (!FlagUse.getUser()->isMachineOpcode())
+ return false;
// Examine the condition code of the user.
- X86::CondCode CC = getCondFromNode(*FlagUI);
+ X86::CondCode CC = getCondFromNode(FlagUse.getUser());
switch (CC) {
// Comparisons which only use the zero flag.
@@ -3354,24 +3355,25 @@ bool X86DAGToDAGISel::onlyUsesZeroFlag(SDValue Flags) const {
/// flag to be accurate.
bool X86DAGToDAGISel::hasNoSignFlagUses(SDValue Flags) const {
// Examine each user of the node.
- for (SDNode::use_iterator UI = Flags->use_begin(), UE = Flags->use_end();
- UI != UE; ++UI) {
+ for (SDUse &Use : Flags->uses()) {
// Only check things that use the flags.
- if (UI.getUse().getResNo() != Flags.getResNo())
+ if (Use.getResNo() != Flags.getResNo())
continue;
+ SDNode *User = Use.getUser();
// Only examine CopyToReg uses that copy to EFLAGS.
- if (UI->getOpcode() != ISD::CopyToReg ||
- cast<RegisterSDNode>(UI->getOperand(1))->getReg() != X86::EFLAGS)
+ if (User->getOpcode() != ISD::CopyToReg ||
+ cast<RegisterSDNode>(User->getOperand(1))->getReg() != X86::EFLAGS)
return false;
// Examine each user of the CopyToReg use.
- for (SDNode::use_iterator FlagUI = UI->use_begin(),
- FlagUE = UI->use_end(); FlagUI != FlagUE; ++FlagUI) {
+ for (SDUse &FlagUse : User->uses()) {
// Only examine the Flag result.
- if (FlagUI.getUse().getResNo() != 1) continue;
+ if (FlagUse.getResNo() != 1)
+ continue;
// Anything unusual: assume conservatively.
- if (!FlagUI->isMachineOpcode()) return false;
+ if (!FlagUse.getUser()->isMachineOpcode())
+ return false;
// Examine the condition code of the user.
- X86::CondCode CC = getCondFromNode(*FlagUI);
+ X86::CondCode CC = getCondFromNode(FlagUse.getUser());
switch (CC) {
// Comparisons which don't examine the SF flag.
@@ -3410,29 +3412,28 @@ static bool mayUseCarryFlag(X86::CondCode CC) {
/// CF flag to be accurate.
bool X86DAGToDAGISel::hasNoCarryFlagUses(SDValue Flags) const {
// Examine each user of the node.
- for (SDNode::use_iterator UI = Flags->use_begin(), UE = Flags->use_end();
- UI != UE; ++UI) {
+ for (SDUse &Use : Flags->uses()) {
// Only check things that use the flags.
- if (UI.getUse().getResNo() != Flags.getResNo())
+ if (Use.getResNo() != Flags.getResNo())
continue;
- unsigned UIOpc = UI->getOpcode();
+ SDNode *User = Use.getUser();
+ unsigned UserOpc = User->getOpcode();
- if (UIOpc == ISD::CopyToReg) {
+ if (UserOpc == ISD::CopyToReg) {
// Only examine CopyToReg uses that copy to EFLAGS.
- if (cast<RegisterSDNode>(UI->getOperand(1))->getReg() != X86::EFLAGS)
+ if (cast<RegisterSDNode>(User->getOperand(1))->getReg() != X86::EFLAGS)
return false;
// Examine each user of the CopyToReg use.
- for (SDNode::use_iterator FlagUI = UI->use_begin(), FlagUE = UI->use_end();
- FlagUI != FlagUE; ++FlagUI) {
+ for (SDUse &FlagUse : User->uses()) {
// Only examine the Flag result.
- if (FlagUI.getUse().getResNo() != 1)
+ if (FlagUse.getResNo() != 1)
continue;
// Anything unusual: assume conservatively.
- if (!FlagUI->isMachineOpcode())
+ if (!FlagUse.getUser()->isMachineOpcode())
return false;
// Examine the condition code of the user.
- X86::CondCode CC = getCondFromNode(*FlagUI);
+ X86::CondCode CC = getCondFromNode(FlagUse.getUser());
if (mayUseCarryFlag(CC))
return false;
@@ -3445,7 +3446,7 @@ static bool mayUseCarryFlag(X86::CondCode CC) {
// This might be an unselected node. So look for the pre-isel opcodes that
// use flags.
unsigned CCOpNo;
- switch (UIOpc) {
+ switch (UserOpc) {
default:
// Something unusual. Be conservative.
return false;
@@ -3455,7 +3456,7 @@ static bool mayUseCarryFlag(X86::CondCode CC) {
case X86ISD::BRCOND: CCOpNo = 2; break;
}
- X86::CondCode CC = (X86::CondCode)UI->getConstantOperandVal(CCOpNo);
+ X86::CondCode CC = (X86::CondCode)User->getConstantOperandVal(CCOpNo);
if (mayUseCarryFlag(CC))
return false;
}
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 3d8af693801254..397af552c39ddb 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -3208,14 +3208,16 @@ bool X86TargetLowering::shouldReduceLoadWidth(SDNode *Load,
// can be store-folded. Therefore, it's probably not worth splitting the load.
EVT VT = Load->getValueType(0);
if ((VT.is256BitVector() || VT.is512BitVector()) && !Load->hasOneUse()) {
- for (auto UI = Load->use_begin(), UE = Load->use_end(); UI != UE; ++UI) {
+ for (SDUse &Use : Load->uses()) {
// Skip uses of the chain value. Result 0 of the node is the load value.
- if (UI.getUse().getResNo() != 0)
+ if (Use.getResNo() != 0)
continue;
+ SDNode *User = Use.getUser();
+
// If this use is not an extract + store, it's probably worth splitting.
- if (UI->getOpcode() != ISD::EXTRACT_SUBVECTOR || !UI->hasOneUse() ||
- UI->user_begin()->getOpcode() != ISD::STORE)
+ if (User->getOpcode() != ISD::EXTRACT_SUBVECTOR || !User->hasOneUse() ||
+ User->user_begin()->getOpcode() != ISD::STORE)
return true;
}
// All non-chain uses are extract + store.
@@ -18965,11 +18967,10 @@ static SDValue GetTLSADDR(SelectionDAG &DAG, GlobalAddressSDNode *GA,
SDValue Ret;
if (LocalDynamic && UseTLSDESC) {
TGA = DAG.getTargetExternalSymbol("_TLS_MODULE_BASE_", PtrVT, OperandFlags);
- auto UI = TGA->use_begin();
// Reuse existing GetTLSADDR node if we can find it.
- if (UI != TGA->use_end()) {
+ if (TGA->hasOneUse()) {
// TLSDESC uses TGA.
- auto TLSDescOp = UI;
+ SDNode *TLSDescOp = *TGA->user_begin();
assert(TLSDescOp->getOpcode() == X86ISD::TLSDESC &&
"Unexpected TLSDESC DAG");
// CALLSEQ_END uses TGA via a chain and glue.
@@ -22869,12 +22870,12 @@ static SDValue MatchVectorAllEqualTest(SDValue LHS, SDValue RHS,
static bool hasNonFlagsUse(SDValue Op) {
for (SDNode::use_iterator UI = Op->use_begin(), UE = Op->use_end(); UI != UE;
++UI) {
- SDNode *User = *UI;
+ SDNode *User = UI->getUser();
unsigned UOpNo = UI.getOperandNo();
if (User->getOpcode() == ISD::TRUNCATE && User->hasOneUse()) {
- // Look pass truncate.
- UOpNo = User->user_begin().getOperandNo();
- User = *User->user_begin();
+ // Look past truncate.
+ UOpNo = User->use_begin().getOperandNo();
+ User = User->use_begin()->getUser();
}
if (User->getOpcode() != ISD::BRCOND && User->getOpcode() != ISD::SETCC &&
@@ -46732,8 +46733,8 @@ static SDValue combineVSelectToBLENDV(SDNode *N, SelectionDAG &DAG,
auto OnlyUsedAsSelectCond = [](SDValue Cond) {
for (SDNode::use_iterator UI = Cond->use_begin(), UE = Cond->use_end();
UI != UE; ++UI)
- if ((UI->getOpcode() != ISD::VSELECT &&
- UI->getOpcode() != X86ISD::BLENDV) ||
+ if ((UI->getUser()->getOpcode() != ISD::VSELECT &&
+ UI->getUser()->getOpcode() != X86ISD::BLENDV) ||
UI.getOperandNo() != 0)
return false;
>From e4962ca7ffa2f8e1dfdf0f8cc61c6d01359e428d Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Thu, 19 Dec 2024 07:37:52 -0800
Subject: [PATCH 2/2] Update llvm/include/llvm/CodeGen/SelectionDAGNodes.h
Co-authored-by: Sergey Barannikov <barannikov88 at gmail.com>
---
llvm/include/llvm/CodeGen/SelectionDAGNodes.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/llvm/include/llvm/CodeGen/SelectionDAGNodes.h b/llvm/include/llvm/CodeGen/SelectionDAGNodes.h
index ff6d4f5f18ed1e..16d44fde99c2b3 100644
--- a/llvm/include/llvm/CodeGen/SelectionDAGNodes.h
+++ b/llvm/include/llvm/CodeGen/SelectionDAGNodes.h
@@ -853,7 +853,7 @@ END_TWO_BYTE_PACK()
bool operator==(const user_iterator &x) const { return UI == x.UI; }
bool operator!=(const user_iterator &x) const { return !operator==(x); }
- // /// Return true if this iterator is at the end of the uses list.
+ /// Return true if this iterator is at the end of the uses list.
bool atEnd() const { return *this == user_iterator(); }
user_iterator &operator++() { // Preincrement
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