[llvm] 5fb8d70 - ARM: Handle vldrh and vstrh in stack access hooks (#120527)

[via llvm-commits]

Author: Matt Arsenault
Date: 2024-12-19T17:55:19+07:00
New Revision: 5fb8d70e5f1c5d26bfa6ca9034863c10f3d8669d

URL: https://github.com/llvm/llvm-project/commit/5fb8d70e5f1c5d26bfa6ca9034863c10f3d8669d
DIFF: https://github.com/llvm/llvm-project/commit/5fb8d70e5f1c5d26bfa6ca9034863c10f3d8669d.diff

LOG: ARM: Handle vldrh and vstrh in stack access hooks (#120527)

Added: 
    

Modified: 
    llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
index e6b37dd9161685..e3e2e83fd5c7eb 100644
--- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
@@ -1330,6 +1330,7 @@ Register ARMBaseInstrInfo::isStoreToStackSlot(const MachineInstr &MI,
   case ARM::tSTRspi:
   case ARM::VSTRD:
   case ARM::VSTRS:
+  case ARM::VSTRH:
   case ARM::VSTR_P0_off:
   case ARM::VSTR_FPSCR_NZCVQC_off:
   case ARM::MVE_VSTRWU32:
@@ -1588,6 +1589,7 @@ Register ARMBaseInstrInfo::isLoadFromStackSlot(const MachineInstr &MI,
   case ARM::tLDRspi:
   case ARM::VLDRD:
   case ARM::VLDRS:
+  case ARM::VLDRH:
   case ARM::VLDR_P0_off:
   case ARM::VLDR_FPSCR_NZCVQC_off:
   case ARM::MVE_VLDRWU32: