[llvm] [X86] Put R20/R21/R28/R29 later in GR64 list (PR #120510)

[Simon Pilgrim via llvm-commits]

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@@ -550,9 +550,9 @@ def SSP : X86Reg<"ssp", 0>;
 // cannot be encoded.
 def GR8 : RegisterClass<"X86", [i8], 8,
                         (add AL, CL, DL, AH, CH, DH, BL, BH, SIL, DIL, BPL, SPL,
-                             R8B, R9B, R10B, R11B, R16B, R17B, R18B, R19B, R20B,
-                             R21B, R22B, R23B, R24B, R25B, R26B, R27B, R28B, R29B,
-                             R30B, R31B, R14B, R15B, R12B, R13B)> {
+                             R8B, R9B, R10B, R11B, R16B, R17B, R18B, R19B, R22B,
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RKSimon wrote:

Update the comment above which refers to R12/R13 being allocated last

https://github.com/llvm/llvm-project/pull/120510