[llvm] [AArch64] Avoid GPR trip when moving truncated i32 vector elements (PR #114541)

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git-clang-format --diff 0800351da4c76c786ce43efe4edc4210f4690875 0534b1e8f16d78e06c28445488a5b9d897e39e84 --extensions cpp -- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
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View the diff from clang-format here.
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diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index 844ce328b7..30a7945bf0 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -20763,13 +20763,16 @@ static SDValue performTruncateCombine(SDNode *N, SelectionDAG &DAG,
            "Unexpected legalisation result!");
 
     EVT SrcVectorType = Op.getValueType();
-    // We also assume that SrcVectorType cannot be a V64 (see LowerEXTRACT_VECTOR_ELT).
+    // We also assume that SrcVectorType cannot be a V64 (see
+    // LowerEXTRACT_VECTOR_ELT).
     assert((SrcVectorType.getScalarType() == MVT::i64 &&
-            SrcVectorType != MVT::v1i64) && "Unexpected legalisation result!");
+            SrcVectorType != MVT::v1i64) &&
+           "Unexpected legalisation result!");
 
-    // If the i64 we are extacting has uses other than this truncation, the upper half
-    // of this value must still be live so we prefer to extract it all at once.
-    if(!N0.hasOneUse())
+    // If the i64 we are extacting has uses other than this truncation, the
+    // upper half of this value must still be live so we prefer to extract it
+    // all at once.
+    if (!N0.hasOneUse())
       return SDValue();
 
     unsigned ExtractIndex =

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https://github.com/llvm/llvm-project/pull/114541