[llvm] [AMDGPU] Restrict promote alloca on pointers across address spaces (PR #119762)

Sumanth Gundapaneni via llvm-commits llvm-commits at lists.llvm.org
Wed Dec 18 10:08:50 PST 2024


================
@@ -198,3 +167,39 @@ entry:
   %tmp = load ptr addrspace(3), ptr addrspace(5) %alloca, align 8
   ret ptr addrspace(3) %tmp
 }
+
+; Will not vectorize because we are doing a load/store of a pointer across
+; address spaces of varying pointer sizes.
+define ptr @alloca_load_store_ptr64_full_ivec(ptr %arg) {
+; CHECK-LABEL: define ptr @alloca_load_store_ptr64_full_ivec
+; CHECK-SAME: (ptr [[ARG:%.*]]) {
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[ALLOCA:%.*]] = alloca [8 x i8], align 8, addrspace(5)
+; CHECK-NEXT:    store ptr [[ARG]], ptr addrspace(5) [[ALLOCA]], align 8
+; CHECK-NEXT:    [[TMP:%.*]] = load ptr, ptr addrspace(5) [[ALLOCA]], align 8
+; CHECK-NEXT:    ret ptr [[TMP]]
+;
+entry:
+  %alloca = alloca [8 x i8], align 8, addrspace(5)
+  store ptr %arg, ptr addrspace(5) %alloca, align 8
+  %tmp = load ptr, ptr addrspace(5) %alloca, align 8
+  ret ptr %tmp
+}
+
+; Will not vectorize because we are doing a load/store of a pointer across
+; address spaces of varying pointer sizes.
----------------
sgundapa wrote:

So, as long as the sizes are same, I can still do the promotion. 

To summarize,
Example 1:  Promote since the sizes are same. alloca - 64 bit, arg - 64 bit
  %alloca = alloca [8 x i8], align 8, addrspace(5)
  store ptr %arg, ptr addrspace(5) %alloca, align 8

Example 2: Do not promote since the sizes are different. alloca - 32 bit , arg - 64 bit
  %alloca = alloca [4 x i8], align 4, addrspace(5)
  store ptr %arg, ptr addrspace(5) %alloca, align 4


For my understanding sake, what happens if the IR is like below.
 %alloca = alloca i32, addrspace(5)
  store ptr %arg, ptr addrspace(5) %alloca

Promote alloca will reject. But, will the 32 bit address %alloca from addrspace (5) be saved in to 64-bit %arg ptr of addrspace(0) ? If so, which half of 32-bits are ignored in addrspace(0).
In cases like above, does the passes expect IR to be in below form ?
 
%alloca = alloca i32, addrspace(5)
%tmp = addrspacecast ptr addrspace(5) %alloca to ptr 
store ptr %arg, ptr addrspace(5) %tmp



https://github.com/llvm/llvm-project/pull/119762


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