[llvm] [RISCV] Select and/or/xor with certain constants to Zbb ANDN/ORN/XNOR (PR #120221)

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Wed Dec 18 09:47:32 PST 2024


================
@@ -3236,6 +3236,22 @@ bool RISCVDAGToDAGISel::selectSHXADD_UWOp(SDValue N, unsigned ShAmt,
   return false;
 }
 
+bool RISCVDAGToDAGISel::selectSImm32fff(SDValue N, SDValue &Val) {
+  if (!isa<ConstantSDNode>(N))
+    return false;
+
+  int64_t Imm = cast<ConstantSDNode>(N)->getSExtValue();
+  if (!(isInt<32>(Imm) && (Imm & 0xfff) == 0xfff && Imm != -1))
----------------
topperc wrote:

Push the `!` into the individual conditions and use `||`.

https://github.com/llvm/llvm-project/pull/120221


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