[llvm] [RISCV] Select and/or/xor with certain constants to Zbb ANDN/ORN/XNOR (PR #120221)

via llvm-commits llvm-commits at lists.llvm.org
Wed Dec 18 09:36:34 PST 2024


github-actions[bot] wrote:

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git-clang-format --diff e7303fe80a0bea124422219356c1c9e845110a77 d8340ac1be29462c3a68962f7dec0b30a91a60dd --extensions cpp,h -- llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
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View the diff from clang-format here.
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diff --git a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
index 072cc1e8f4..d9ef845043 100644
--- a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
@@ -3245,7 +3245,8 @@ bool RISCVDAGToDAGISel::selectSImm32fff(SDValue N, SDValue &Val) {
     return false;
 
   if (!std::all_of(N->use_begin(), N->use_end(), [](const SDNode *U) {
-	return ISD::isBitwiseLogicOp(U->getOpcode()); }))
+        return ISD::isBitwiseLogicOp(U->getOpcode());
+      }))
     return false;
 
   Val = selectImm(CurDAG, SDLoc(N), N->getSimpleValueType(0), ~Imm, *Subtarget);

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https://github.com/llvm/llvm-project/pull/120221


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