[llvm] [RISCV] Select and/or/xor with certain constants to Zbb ANDN/ORN/XNOR (PR #120221)

[Sam Elliott via llvm-commits]

================
@@ -5,109 +5,77 @@
 ; RUN:   | FileCheck %s --check-prefixes=CHECK,RV64
 
 define i32 @and0xabcdefff(i32 %x) {
-; RV32-LABEL: and0xabcdefff:
-; RV32:       # %bb.0:
-; RV32-NEXT:    lui a1, 703711
-; RV32-NEXT:    addi a1, a1, -1
-; RV32-NEXT:    and a0, a0, a1
-; RV32-NEXT:    ret
-;
-; RV64-LABEL: and0xabcdefff:
-; RV64:       # %bb.0:
-; RV64-NEXT:    lui a1, 703711
-; RV64-NEXT:    addiw a1, a1, -1
-; RV64-NEXT:    and a0, a0, a1
-; RV64-NEXT:    ret
+; CHECK-LABEL: and0xabcdefff:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    lui a1, 344865
+; CHECK-NEXT:    andn a0, a0, a1
+; CHECK-NEXT:    ret
   %and = and i32 %x, -1412567041
   ret i32 %and
 }
 
 define i32 @orlow13(i32 %x) {
-; RV32-LABEL: orlow13:
-; RV32:       # %bb.0:
-; RV32-NEXT:    lui a1, 2
-; RV32-NEXT:    addi a1, a1, -1
-; RV32-NEXT:    or a0, a0, a1
-; RV32-NEXT:    ret
-;
-; RV64-LABEL: orlow13:
-; RV64:       # %bb.0:
-; RV64-NEXT:    lui a1, 2
-; RV64-NEXT:    addiw a1, a1, -1
-; RV64-NEXT:    or a0, a0, a1
-; RV64-NEXT:    ret
+; CHECK-LABEL: orlow13:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    lui a1, 1048574
+; CHECK-NEXT:    orn a0, a0, a1
+; CHECK-NEXT:    ret
   %or = or i32 %x, 8191
   ret i32 %or
 }
 
 define i64 @orlow24(i64 %x) {
 ; RV32-LABEL: orlow24:
 ; RV32:       # %bb.0:
-; RV32-NEXT:    lui a2, 4096
-; RV32-NEXT:    addi a2, a2, -1
-; RV32-NEXT:    or a0, a0, a2
+; RV32-NEXT:    lui a2, 1044480
+; RV32-NEXT:    orn a0, a0, a2
 ; RV32-NEXT:    ret
 ;
 ; RV64-LABEL: orlow24:
 ; RV64:       # %bb.0:
-; RV64-NEXT:    lui a1, 4096
-; RV64-NEXT:    addiw a1, a1, -1
-; RV64-NEXT:    or a0, a0, a1
+; RV64-NEXT:    lui a1, 1044480
+; RV64-NEXT:    orn a0, a0, a1
 ; RV64-NEXT:    ret
   %or = or i64 %x, 16777215
   ret i64 %or
 }
 
 define i32 @xorlow16(i32 %x) {
-; RV32-LABEL: xorlow16:
-; RV32:       # %bb.0:
-; RV32-NEXT:    lui a1, 16
-; RV32-NEXT:    addi a1, a1, -1
-; RV32-NEXT:    xor a0, a0, a1
-; RV32-NEXT:    ret
-;
-; RV64-LABEL: xorlow16:
-; RV64:       # %bb.0:
-; RV64-NEXT:    lui a1, 16
-; RV64-NEXT:    addiw a1, a1, -1
-; RV64-NEXT:    xor a0, a0, a1
-; RV64-NEXT:    ret
+; CHECK-LABEL: xorlow16:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    lui a1, 1048560
+; CHECK-NEXT:    xnor a0, a0, a1
+; CHECK-NEXT:    ret
   %xor = xor i32 %x, 65535
   ret i32 %xor
 }
 
 define i32 @xorlow31(i32 %x) {
-; RV32-LABEL: xorlow31:
-; RV32:       # %bb.0:
-; RV32-NEXT:    lui a1, 524288
-; RV32-NEXT:    addi a1, a1, -1
-; RV32-NEXT:    xor a0, a0, a1
-; RV32-NEXT:    ret
-;
-; RV64-LABEL: xorlow31:
-; RV64:       # %bb.0:
-; RV64-NEXT:    lui a1, 524288
-; RV64-NEXT:    addiw a1, a1, -1
-; RV64-NEXT:    xor a0, a0, a1
-; RV64-NEXT:    ret
+; CHECK-LABEL: xorlow31:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    lui a1, 524288
+; CHECK-NEXT:    xnor a0, a0, a1
+; CHECK-NEXT:    ret
   %xor = xor i32 %x, 2147483647
   ret i32 %xor
 }
 
 define i32 @oraddlow16(i32 %x) {
 ; RV32-LABEL: oraddlow16:
 ; RV32:       # %bb.0:
+; RV32-NEXT:    lui a1, 1048560
+; RV32-NEXT:    orn a0, a0, a1
----------------
lenary wrote:

Can you do a `hasOneUse` check on the ConstantSDNode? I don't know whether it's worth trying.

https://github.com/llvm/llvm-project/pull/120221