[llvm] [AMDGPU] Update base addr of dyn alloca considering GrowingUp stack (PR #119822)
Sergei Barannikov via llvm-commits
llvm-commits at lists.llvm.org
Wed Dec 18 08:21:28 PST 2024
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@@ -4037,31 +4038,35 @@ SDValue SITargetLowering::lowerDYNAMIC_STACKALLOCImpl(SDValue Op,
Chain = DAG.getCALLSEQ_START(Chain, 0, 0, dl);
SDValue Size = Tmp2.getOperand(1);
- SDValue SP = DAG.getCopyFromReg(Chain, dl, SPReg, VT);
- Chain = SP.getValue(1);
- MaybeAlign Alignment = cast<ConstantSDNode>(Tmp3)->getMaybeAlignValue();
+ SDValue BaseAddr = DAG.getCopyFromReg(Chain, dl, SPReg, VT);
+ Align Alignment = cast<ConstantSDNode>(Tmp3)->getAlignValue();
+
const TargetFrameLowering *TFL = Subtarget->getFrameLowering();
assert(TFL->getStackGrowthDirection() == TargetFrameLowering::StackGrowsUp &&
"Stack grows upwards for AMDGPU");
+ Chain = BaseAddr.getValue(1);
+ Align StackAlign = TFL->getStackAlign();
+ if (Alignment > StackAlign) {
+ auto ScaledAlignment = (uint64_t)Alignment.value()
+ << Subtarget->getWavefrontSizeLog2();
+ auto StackAlignMask = ScaledAlignment - 1;
+ auto TmpAddr = DAG.getNode(ISD::ADD, dl, VT, BaseAddr,
+ DAG.getConstant(StackAlignMask, dl, VT));
+ BaseAddr = DAG.getNode(ISD::AND, dl, VT, TmpAddr,
+ DAG.getConstant(ScaledAlignment, dl, VT));
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s-barannikov wrote:
It should clear the low bits.
https://github.com/llvm/llvm-project/pull/119822
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