[llvm] [AArch64][SME2] Extend getRegAllocationHints for ZPRStridedOrContiguousReg (PR #119865)

[Sander de Smalen via llvm-commits]

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@@ -1099,6 +1099,38 @@ bool AArch64RegisterInfo::getRegAllocationHints(
     const VirtRegMap *VRM, const LiveRegMatrix *Matrix) const {
   const MachineRegisterInfo &MRI = MF.getRegInfo();
 
+  // Since the SVE calling convention preserves registers Z8-Z23, there are no
+  // ZPR2Strided or ZPR4Strided registers which do not overlap with the
+  // callee-saved registers. These will be pushed to the back of the allocation
+  // order for the ZPRStridedOrContiguous classes.
+  // However, if any of the instructions which define VirtReg are
+  // ZPRStridedOrContiguous registers used by a FORM_TRANSPOSED_REG_TUPLE
+  // pseudo, it will likely be better to try assigning a strided register
+  // anyway to avoid extra copy instructions.
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sdesmalen-arm wrote:

nit:
```suggestion
  // If any of the instructions which define VirtReg are
  // used by the FORM_TRANSPOSED_REG_TUPLE
  // pseudo, we actually want to favour reducing copy instructions over reducing the number of clobbered callee-save registers, so we add the registers as a hint.
```
(+clang-format)

https://github.com/llvm/llvm-project/pull/119865