[llvm] [RISCV][VLOPT] Enable the RISCVVLOptimizer by default (PR #119461)
Michael Maitland via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 17 20:48:57 PST 2024
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@@ -97,8 +97,9 @@ define <4 x i32> @v4i32_v8i32(<8 x i32>) {
define <4 x i32> @v4i32_v16i32(<16 x i32>) {
; RV32-LABEL: v4i32_v16i32:
; RV32: # %bb.0:
-; RV32-NEXT: vsetivli zero, 8, e16, m1, ta, ma
+; RV32-NEXT: vsetivli zero, 2, e16, m1, ta, ma
; RV32-NEXT: vmv.v.i v12, 1
+; RV32-NEXT: vsetivli zero, 8, e16, m1, ta, ma
; RV32-NEXT: vmv.v.i v14, 6
----------------
michaelmaitland wrote:
Take a look at the MIR: https://godbolt.org/z/xrvG13qx6
You can see that `%4` is used as a tied operand.
https://github.com/llvm/llvm-project/blob/644643a4ee931ce24c27702851a93160cf0f1248/llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp#L917
https://github.com/llvm/llvm-project/pull/119461
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