[llvm] [AMDGPU][True16][MC] update VOP1 dasm test with latest script (PR #120281)
Joe Nash via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 17 14:17:12 PST 2024
================
@@ -1,3644 +1,3646 @@
+# NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --version 5
# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefixes=GFX11,GFX11-REAL16 %s
# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefixes=GFX11,GFX11-FAKE16 %s
# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+real-true16,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefixes=GFX11,GFX11-REAL16 %s
# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=-real-true16,+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefixes=GFX11,GFX11-FAKE16 %s
-# GFX11: v_bfrev_b32_e32 v5, v1 ; encoding: [0x01,0x71,0x0a,0x7e]
0x01,0x71,0x0a,0x7e
+# GFX11: v_bfrev_b32_e32 v5, v1 ; encoding: [0x01,0x71,0x0a,0x7e]
-# GFX11: v_bfrev_b32_e32 v5, v255 ; encoding: [0xff,0x71,0x0a,0x7e]
0xff,0x71,0x0a,0x7e
+# GFX11: v_bfrev_b32_e32 v5, v255 ; encoding: [0xff,0x71,0x0a,0x7e]
-# GFX11: v_bfrev_b32_e32 v5, s1 ; encoding: [0x01,0x70,0x0a,0x7e]
0x01,0x70,0x0a,0x7e
+# GFX11: v_bfrev_b32_e32 v5, s1 ; encoding: [0x01,0x70,0x0a,0x7e]
-# GFX11: v_bfrev_b32_e32 v5, s105 ; encoding: [0x69,0x70,0x0a,0x7e]
0x69,0x70,0x0a,0x7e
+# GFX11: v_bfrev_b32_e32 v5, s105 ; encoding: [0x69,0x70,0x0a,0x7e]
-# GFX11: v_bfrev_b32_e32 v5, vcc_lo ; encoding: [0x6a,0x70,0x0a,0x7e]
0x6a,0x70,0x0a,0x7e
+# GFX11: v_bfrev_b32_e32 v5, vcc_lo ; encoding: [0x6a,0x70,0x0a,0x7e]
-# GFX11: v_bfrev_b32_e32 v5, vcc_hi ; encoding: [0x6b,0x70,0x0a,0x7e]
0x6b,0x70,0x0a,0x7e
+# GFX11: v_bfrev_b32_e32 v5, vcc_hi ; encoding: [0x6b,0x70,0x0a,0x7e]
-# GFX11: v_bfrev_b32_e32 v5, ttmp15 ; encoding: [0x7b,0x70,0x0a,0x7e]
0x7b,0x70,0x0a,0x7e
+# GFX11: v_bfrev_b32_e32 v5, ttmp15 ; encoding: [0x7b,0x70,0x0a,0x7e]
-# GFX11: v_bfrev_b32_e32 v5, m0 ; encoding: [0x7d,0x70,0x0a,0x7e]
0x7d,0x70,0x0a,0x7e
+# GFX11: v_bfrev_b32_e32 v5, m0 ; encoding: [0x7d,0x70,0x0a,0x7e]
-# GFX11: v_bfrev_b32_e32 v5, exec_lo ; encoding: [0x7e,0x70,0x0a,0x7e]
0x7e,0x70,0x0a,0x7e
+# GFX11: v_bfrev_b32_e32 v5, exec_lo ; encoding: [0x7e,0x70,0x0a,0x7e]
-# GFX11: v_bfrev_b32_e32 v5, exec_hi ; encoding: [0x7f,0x70,0x0a,0x7e]
0x7f,0x70,0x0a,0x7e
+# GFX11: v_bfrev_b32_e32 v5, exec_hi ; encoding: [0x7f,0x70,0x0a,0x7e]
-# GFX11: v_bfrev_b32_e32 v5, null ; encoding: [0x7c,0x70,0x0a,0x7e]
0x7c,0x70,0x0a,0x7e
+# GFX11: v_bfrev_b32_e32 v5, null ; encoding: [0x7c,0x70,0x0a,0x7e]
-# GFX11: v_bfrev_b32_e32 v5, -1 ; encoding: [0xc1,0x70,0x0a,0x7e]
0xc1,0x70,0x0a,0x7e
+# GFX11: v_bfrev_b32_e32 v5, -1 ; encoding: [0xc1,0x70,0x0a,0x7e]
-# GFX11: v_bfrev_b32_e32 v5, 0.5 ; encoding: [0xf0,0x70,0x0a,0x7e]
0xf0,0x70,0x0a,0x7e
+# GFX11: v_bfrev_b32_e32 v5, 0.5 ; encoding: [0xf0,0x70,0x0a,0x7e]
-# GFX11: v_bfrev_b32_e32 v5, src_scc ; encoding: [0xfd,0x70,0x0a,0x7e]
0xfd,0x70,0x0a,0x7e
+# GFX11: v_bfrev_b32_e32 v5, src_scc ; encoding: [0xfd,0x70,0x0a,0x7e]
-# GFX11: v_bfrev_b32_e32 v255, 0xaf123456 ; encoding: [0xff,0x70,0xfe,0x7f,0x56,0x34,0x12,0xaf]
0xff,0x70,0xfe,0x7f,0x56,0x34,0x12,0xaf
+# GFX11: v_bfrev_b32_e32 v255, 0xaf123456 ; encoding: [0xff,0x70,0xfe,0x7f,0x56,0x34,0x12,0xaf]
-# GFX11-FAKE16: v_ceil_f16_e32 v5, v1 ; encoding: [0x01,0xb9,0x0a,0x7e]
-# GFX11-REAL16: v_ceil_f16_e32 v5.l, v1.l ; encoding: [0x01,0xb9,0x0a,0x7e]
0x01,0xb9,0x0a,0x7e
+# GFX11-REAL16: v_ceil_f16_e32 v5.l, v1.l ; encoding: [0x01,0xb9,0x0a,0x7e]
+# GFX11-FAKE16: v_ceil_f16_e32 v5, v1 ; encoding: [0x01,0xb9,0x0a,0x7e]
-# GFX11-FAKE16: v_ceil_f16_e32 v5, v127 ; encoding: [0x7f,0xb9,0x0a,0x7e]
-# GFX11-REAL16: v_ceil_f16_e32 v5.l, v127.l ; encoding: [0x7f,0xb9,0x0a,0x7e]
0x7f,0xb9,0x0a,0x7e
+# GFX11-REAL16: v_ceil_f16_e32 v5.l, v127.l ; encoding: [0x7f,0xb9,0x0a,0x7e]
+# GFX11-FAKE16: v_ceil_f16_e32 v5, v127 ; encoding: [0x7f,0xb9,0x0a,0x7e]
-# GFX11-FAKE16: v_ceil_f16_e32 v5, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/ ; encoding: [0x81,0xb9,0x0a,0x7e]
-# GFX11-REAL16: v_ceil_f16_e32 v5.l, v1.h ; encoding: [0x81,0xb9,0x0a,0x7e]
0x81,0xb9,0x0a,0x7e
+# GFX11-REAL16: v_ceil_f16_e32 v5.l, v1.h ; encoding: [0x81,0xb9,0x0a,0x7e]
+# GFX11-FAKE16: v_ceil_f16_e32 v5, v129/*Invalid register, operand has 'VS_32_Lo128' register class*/ ; encoding: [0x81,0xb9,0x0a,0x7e]
-# GFX11-FAKE16: v_ceil_f16_e32 v5, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/ ; encoding: [0xff,0xb9,0x0a,0x7e]
-# GFX11-REAL16: v_ceil_f16_e32 v5.l, v127.h ; encoding: [0xff,0xb9,0x0a,0x7e]
0xff,0xb9,0x0a,0x7e
+# GFX11-REAL16: v_ceil_f16_e32 v5.l, v127.h ; encoding: [0xff,0xb9,0x0a,0x7e]
+# GFX11-FAKE16: v_ceil_f16_e32 v5, v255/*Invalid register, operand has 'VS_32_Lo128' register class*/ ; encoding: [0xff,0xb9,0x0a,0x7e]
-# GFX11-FAKE16: v_ceil_f16_e32 v5, s1 ; encoding: [0x01,0xb8,0x0a,0x7e]
-# GFX11-REAL16: v_ceil_f16_e32 v5.l, s1 ; encoding: [0x01,0xb8,0x0a,0x7e]
0x01,0xb8,0x0a,0x7e
+# GFX11-REAL16: v_ceil_f16_e32 v5.l, s1 ; encoding: [0x01,0xb8,0x0a,0x7e]
+# GFX11-FAKE16: v_ceil_f16_e32 v5, s1 ; encoding: [0x01,0xb8,0x0a,0x7e]
-# GFX11-FAKE16: v_ceil_f16_e32 v5, s105 ; encoding: [0x69,0xb8,0x0a,0x7e]
-# GFX11-REAL16: v_ceil_f16_e32 v5.l, s105 ; encoding: [0x69,0xb8,0x0a,0x7e]
0x69,0xb8,0x0a,0x7e
+# GFX11-REAL16: v_ceil_f16_e32 v5.l, s105 ; encoding: [0x69,0xb8,0x0a,0x7e]
+# GFX11-FAKE16: v_ceil_f16_e32 v5, s105 ; encoding: [0x69,0xb8,0x0a,0x7e]
-# GFX11-FAKE16: v_ceil_f16_e32 v5, vcc_lo ; encoding: [0x6a,0xb8,0x0a,0x7e]
-# GFX11-REAL16: v_ceil_f16_e32 v5.l, vcc_lo ; encoding: [0x6a,0xb8,0x0a,0x7e]
0x6a,0xb8,0x0a,0x7e
+# GFX11-REAL16: v_ceil_f16_e32 v5.l, vcc_lo ; encoding: [0x6a,0xb8,0x0a,0x7e]
+# GFX11-FAKE16: v_ceil_f16_e32 v5, vcc_lo ; encoding: [0x6a,0xb8,0x0a,0x7e]
-# GFX11-FAKE16: v_ceil_f16_e32 v5, vcc_hi ; encoding: [0x6b,0xb8,0x0a,0x7e]
-# GFX11-REAL16: v_ceil_f16_e32 v5.l, vcc_hi ; encoding: [0x6b,0xb8,0x0a,0x7e]
0x6b,0xb8,0x0a,0x7e
+# GFX11-REAL16: v_ceil_f16_e32 v5.l, vcc_hi ; encoding: [0x6b,0xb8,0x0a,0x7e]
+# GFX11-FAKE16: v_ceil_f16_e32 v5, vcc_hi ; encoding: [0x6b,0xb8,0x0a,0x7e]
-# GFX11-FAKE16: v_ceil_f16_e32 v5, ttmp15 ; encoding: [0x7b,0xb8,0x0a,0x7e]
-# GFX11-REAL16: v_ceil_f16_e32 v5.l, ttmp15 ; encoding: [0x7b,0xb8,0x0a,0x7e]
0x7b,0xb8,0x0a,0x7e
+# GFX11-REAL16: v_ceil_f16_e32 v5.l, ttmp15 ; encoding: [0x7b,0xb8,0x0a,0x7e]
+# GFX11-FAKE16: v_ceil_f16_e32 v5, ttmp15 ; encoding: [0x7b,0xb8,0x0a,0x7e]
-# GFX11-FAKE16: v_ceil_f16_e32 v5, m0 ; encoding: [0x7d,0xb8,0x0a,0x7e]
-# GFX11-REAL16: v_ceil_f16_e32 v5.l, m0 ; encoding: [0x7d,0xb8,0x0a,0x7e]
0x7d,0xb8,0x0a,0x7e
+# GFX11-REAL16: v_ceil_f16_e32 v5.l, m0 ; encoding: [0x7d,0xb8,0x0a,0x7e]
+# GFX11-FAKE16: v_ceil_f16_e32 v5, m0 ; encoding: [0x7d,0xb8,0x0a,0x7e]
-# GFX11-FAKE16: v_ceil_f16_e32 v5, exec_lo ; encoding: [0x7e,0xb8,0x0a,0x7e]
-# GFX11-REAL16: v_ceil_f16_e32 v5.l, exec_lo ; encoding: [0x7e,0xb8,0x0a,0x7e]
0x7e,0xb8,0x0a,0x7e
+# GFX11-REAL16: v_ceil_f16_e32 v5.l, exec_lo ; encoding: [0x7e,0xb8,0x0a,0x7e]
+# GFX11-FAKE16: v_ceil_f16_e32 v5, exec_lo ; encoding: [0x7e,0xb8,0x0a,0x7e]
-# GFX11-FAKE16: v_ceil_f16_e32 v5, exec_hi ; encoding: [0x7f,0xb8,0x0a,0x7e]
-# GFX11-REAL16: v_ceil_f16_e32 v5.l, exec_hi ; encoding: [0x7f,0xb8,0x0a,0x7e]
0x7f,0xb8,0x0a,0x7e
+# GFX11-REAL16: v_ceil_f16_e32 v5.l, exec_hi ; encoding: [0x7f,0xb8,0x0a,0x7e]
+# GFX11-FAKE16: v_ceil_f16_e32 v5, exec_hi ; encoding: [0x7f,0xb8,0x0a,0x7e]
-# GFX11-FAKE16: v_ceil_f16_e32 v5, null ; encoding: [0x7c,0xb8,0x0a,0x7e]
-# GFX11-REAL16: v_ceil_f16_e32 v5.l, null ; encoding: [0x7c,0xb8,0x0a,0x7e]
0x7c,0xb8,0x0a,0x7e
+# GFX11-REAL16: v_ceil_f16_e32 v5.l, null ; encoding: [0x7c,0xb8,0x0a,0x7e]
+# GFX11-FAKE16: v_ceil_f16_e32 v5, null ; encoding: [0x7c,0xb8,0x0a,0x7e]
-# GFX11-FAKE16: v_ceil_f16_e32 v5, -1 ; encoding: [0xc1,0xb8,0x0a,0x7e]
-# GFX11-REAL16: v_ceil_f16_e32 v5.l, -1 ; encoding: [0xc1,0xb8,0x0a,0x7e]
0xc1,0xb8,0x0a,0x7e
+# GFX11-REAL16: v_ceil_f16_e32 v5.l, -1 ; encoding: [0xc1,0xb8,0x0a,0x7e]
+# GFX11-FAKE16: v_ceil_f16_e32 v5, -1 ; encoding: [0xc1,0xb8,0x0a,0x7e]
-# GFX11-FAKE16: v_ceil_f16_e32 v127, 0.5 ; encoding: [0xf0,0xb8,0xfe,0x7e]
-# GFX11-REAL16: v_ceil_f16_e32 v127.l, 0.5 ; encoding: [0xf0,0xb8,0xfe,0x7e]
0xf0,0xb8,0xfe,0x7e
+# GFX11-REAL16: v_ceil_f16_e32 v127.l, 0.5 ; encoding: [0xf0,0xb8,0xfe,0x7e]
+# GFX11-FAKE16: v_ceil_f16_e32 v127, 0.5 ; encoding: [0xf0,0xb8,0xfe,0x7e]
-# COM: GFX11-FAKE16: warning: invalid instruction encoding 0xfd,0xb8,0x0a,0x7f
-# GFX11-REAL16: v_ceil_f16_e32 v5.h, src_scc ; encoding: [0xfd,0xb8,0x0a,0x7f]
0xfd,0xb8,0x0a,0x7f
+# GFX11-REAL16: v_ceil_f16_e32 v5.h, src_scc ; encoding: [0xfd,0xb8,0x0a,0x7f]
----------------
Sisyph wrote:
Why do we not have Fake16 output here? We have some output for most cases of using .h register input, but not all.
Othewise LGTM
https://github.com/llvm/llvm-project/pull/120281
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