[llvm] [RISCV][VLOPT] Enable the RISCVVLOptimizer by default (PR #119461)

[Philip Reames via llvm-commits]

================
@@ -348,8 +348,9 @@ define <8 x i8> @splat_ve4_ins_i0ve2(<8 x i8> %v) {
 define <8 x i8> @splat_ve4_ins_i1ve3(<8 x i8> %v) {
 ; CHECK-LABEL: splat_ve4_ins_i1ve3:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, ma
+; CHECK-NEXT:    vsetivli zero, 2, e8, mf2, ta, ma
 ; CHECK-NEXT:    vmv.v.i v9, 3
+; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, ma
----------------
preames wrote:

Non blocking, but this shows a case where we probably want to teach VSETVLI insertion that it can *increase* VL if the instruction is tail undefined.  

https://github.com/llvm/llvm-project/pull/119461