[clang] [llvm] [clang][llvm][aarch64] Add aarch64_sme_in_streaming_mode intrinsic (PR #120265)

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<!--LLVM CODE FORMAT COMMENT: {clang-format}-->


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``````````bash
git-clang-format --diff 9fc54c0e8049553a30c17a3698445d58800916c9 898c30b5b97e80b8bdeb024aec30d0e530d39d42 --extensions cpp,c -- clang/test/CodeGen/AArch64/sme-intrinsics/acle_sme_state_funs.c clang/utils/TableGen/SveEmitter.cpp llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
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View the diff from clang-format here.
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``````````diff
diff --git a/clang/utils/TableGen/SveEmitter.cpp b/clang/utils/TableGen/SveEmitter.cpp
index 883eb990f7..6168983b18 100644
--- a/clang/utils/TableGen/SveEmitter.cpp
+++ b/clang/utils/TableGen/SveEmitter.cpp
@@ -1636,7 +1636,9 @@ void SVEEmitter::createSMEHeader(raw_ostream &OS) {
   OS << "  return x0 & (1ULL << 63);\n";
   OS << "}\n\n";
 
-  OS << "__ai __attribute__((__clang_arm_builtin_alias(__builtin_sme_in_streaming_mode)))";
+  OS << "__ai "
+        "__attribute__((__clang_arm_builtin_alias(__builtin_sme_in_streaming_"
+        "mode)))";
   OS << " bool __arm_in_streaming_mode(void) __arm_streaming_compatible;\n\n";
 
   OS << "void *__arm_sc_memcpy(void *dest, const void *src, size_t n) __arm_streaming_compatible;\n";
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index 708753f576..7af38bc82a 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -27295,11 +27295,13 @@ void AArch64TargetLowering::ReplaceNodeResults(
       Results.push_back(DAG.getNode(ISD::TRUNCATE, DL, VT, V));
       return;
     }
-      case Intrinsic::aarch64_sme_in_streaming_mode: {
+    case Intrinsic::aarch64_sme_in_streaming_mode: {
       auto DL = SDLoc(N);
       SDValue Chain = DAG.getEntryNode();
-      auto RuntimePStateSM = getRuntimePStateSM(DAG, Chain, DL, N->getValueType(0));
-      Results.push_back(DAG.getNode(ISD::TRUNCATE, DL, MVT::i1, RuntimePStateSM));
+      auto RuntimePStateSM =
+          getRuntimePStateSM(DAG, Chain, DL, N->getValueType(0));
+      Results.push_back(
+          DAG.getNode(ISD::TRUNCATE, DL, MVT::i1, RuntimePStateSM));
       return;
     }
     case Intrinsic::experimental_vector_match:

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https://github.com/llvm/llvm-project/pull/120265