[llvm] [RISCV] Fix typo in CV_SH_rr_inc pattern (PR #120246)

[Sam Elliott via llvm-commits]

lenary wrote:

You're almost right with your file header, but not quite.

You need to make sure that the `-stop-after=` is naming the right pass. I think `instruction-select` is the GlobalISel name, and you want `riscv-isel` for the default pipeline (SelectionDAG).

I'm not sure you can use `update_llc_test_checks.py` with MIR output - you want `update_mir_test_checks.py`. I think a test ending at selection only would be enough for this change, because I don't think it's possible to mix `update_mir_test_checks.py` (mir output) and `update_llc_test_checks.py` (asm output).

https://github.com/llvm/llvm-project/pull/120246