[llvm] [NVPTX] Attempt to load params using symbol addition node directly (PR #119935)

[Kevin McAfee via llvm-commits]

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@@ -0,0 +1,44 @@
+; RUN: llc < %s -march=nvptx64 --debug-counter=dagcombine=0 | FileCheck %s
+; RUN: %if ptxas %{ llc < %s -march=nvptx64 | %ptxas-verify %}
+
+%struct.8float = type <{ [8 x float] }>
+
+declare i32 @callee(%struct.8float %a)
+
+define i32 @test(%struct.8float alignstack(32) %data) {
+  ;CHECK-NOT: add.
+  ;CHECK-DAG: ld.param.u8 %r{{.*}}, [test_param_0];
+  ;CHECK-DAG: ld.param.u8 %r{{.*}}, [test_param_0+1];
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kalxr wrote:

>llc --print-after nvptx-isel would give you the DAG printout above.

I forgot DAG can refer to post-ISEL machine functions, not just the SelectionDAG, so that makes sense.

> Or you can build llc with debug info enabled and check what's going on when we're lowering the function arguments.

I did some of this with `-debug-only=isel` to inspect the SelectionDAG with and without combines, which is how I figured out this param issue existed.

> I find it very useful to run llc under rr (https://rr-project.org/) which allows you to step back and forth in time so you can backtrack things.

Thanks for sharing this, seems like a good resource!

I'm still confused as to what the problematic divergence is supposed to be, or what I should be trying to figure out. While the DAGs in https://github.com/llvm/llvm-project/pull/119935#discussion_r1887660119 are different, they are printed at a point after DAG combines would have occurred, so it seems reasonable that disabling combines causes a difference. That the same inputs and same flags lead to different outputs also seems reasonable given one of the flags is intended for debugging and is ignored by release builds. If there was a difference in the initial SelectionDAGs then that would be a problem, but I'm not seeing evidence of that.

@justinfargnoli -
> I'd also be interested to see which optimization is eliminating the add symbol, const.

`add symbol, const` is not eliminated in an optimization. The relevant optimization is something like `add (add symbol, const1), const2 -> add symbol, const3` where `const3=const1+const2`. The `add symbol, const` nodes/instructions are supposed to end up unused during ISEL and thus be removed from the DAG. The `SelectADDRsi` functions examine those nodes to find the symbol and offset and use those directly in loads/stores. The issue arises when they are used in other instructions than loads or stores (like adds) as these don't have the selection logic to deal with them properly. This change isn't really porting a DAG combine, it's making the `SelectADDRsi` functions better able to fulfill their purpose of finding a symbol and offset for use in a load/store. 

https://github.com/llvm/llvm-project/pull/119935