[llvm] [AMDGPU] fix SIPeepholeSDWA optimization for fp16 (PR #109395)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 17 01:48:29 PST 2024
arsenm wrote:
> > Yes, VOPC instructions are available in a VOP3 form as well.
>
> Thank you for your feedback!
>
> It's a weird case here then. I have no clue what is wrong with int8 sorting. Why some of the output values are becoming -1's? all I can see in the final ASM diff is the folding of bfe into sdwa.
You keep stating random fragments of information and ISA with no context. I have no idea what testcase you're looking at, or how it's related to the issue title of "fp16", int8 sorting, or how you concluded your issue is related to SDWA
https://github.com/llvm/llvm-project/pull/109395
More information about the llvm-commits
mailing list