[llvm] 3508d8f - RegAllocFast: Avoid using temporary DiagnosticInfo (#120184)

via llvm-commits llvm-commits at lists.llvm.org
Tue Dec 17 01:19:30 PST 2024


Author: Matt Arsenault
Date: 2024-12-17T16:19:26+07:00
New Revision: 3508d8f6ddd65e27486fad70cdce47adebafc364

URL: https://github.com/llvm/llvm-project/commit/3508d8f6ddd65e27486fad70cdce47adebafc364
DIFF: https://github.com/llvm/llvm-project/commit/3508d8f6ddd65e27486fad70cdce47adebafc364.diff

LOG: RegAllocFast: Avoid using temporary DiagnosticInfo (#120184)

This reverts commit 1297933f35b4948b4d281259627a72094c407a75.

Added: 
    

Modified: 
    llvm/lib/CodeGen/RegAllocFast.cpp
    llvm/test/CodeGen/AMDGPU/ran-out-of-registers-error-all-regs-reserved.ll
    llvm/test/CodeGen/AMDGPU/ran-out-of-registers-errors.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/CodeGen/RegAllocFast.cpp b/llvm/lib/CodeGen/RegAllocFast.cpp
index fd3914f864c00c..c31e7201796e67 100644
--- a/llvm/lib/CodeGen/RegAllocFast.cpp
+++ b/llvm/lib/CodeGen/RegAllocFast.cpp
@@ -1206,10 +1206,9 @@ MCPhysReg RegAllocFastImpl::getErrorAssignment(const LiveReg &LR,
           "inline assembly requires more registers than available");
     } else {
       const Function &Fn = MBB->getParent()->getFunction();
-      DiagnosticInfoRegAllocFailure DI(
+      Fn.getContext().diagnose(DiagnosticInfoRegAllocFailure(
           "ran out of registers during register allocation", Fn,
-          MI.getDebugLoc());
-      Fn.getContext().diagnose(DI);
+          MI.getDebugLoc()));
     }
   }
 

diff  --git a/llvm/test/CodeGen/AMDGPU/ran-out-of-registers-error-all-regs-reserved.ll b/llvm/test/CodeGen/AMDGPU/ran-out-of-registers-error-all-regs-reserved.ll
index 03860b7f366661..388a8e804a8896 100644
--- a/llvm/test/CodeGen/AMDGPU/ran-out-of-registers-error-all-regs-reserved.ll
+++ b/llvm/test/CodeGen/AMDGPU/ran-out-of-registers-error-all-regs-reserved.ll
@@ -1,4 +1,3 @@
-; UNSUPPORTED: target={{.*}}
 ; RUN: not llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 -vgpr-regalloc=greedy -verify-machineinstrs=0 -filetype=null %s 2>&1 | FileCheck -implicit-check-not=error %s
 ; RUN: not llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 -vgpr-regalloc=basic -verify-machineinstrs=0 -filetype=null %s 2>&1 | FileCheck -implicit-check-not=error %s
 ; RUN: not llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 -vgpr-regalloc=fast -verify-machineinstrs=0 -filetype=null %s 2>&1 | FileCheck -implicit-check-not=error %s

diff  --git a/llvm/test/CodeGen/AMDGPU/ran-out-of-registers-errors.ll b/llvm/test/CodeGen/AMDGPU/ran-out-of-registers-errors.ll
index da229d157fb763..bd1752d21507ca 100644
--- a/llvm/test/CodeGen/AMDGPU/ran-out-of-registers-errors.ll
+++ b/llvm/test/CodeGen/AMDGPU/ran-out-of-registers-errors.ll
@@ -1,5 +1,3 @@
-; UNSUPPORTED: target={{.*}}
-;
 ; RUN: not llc -mtriple=amdgcn-amd-amdhsa -stress-regalloc=1 -vgpr-regalloc=greedy -filetype=null %s 2>&1 | FileCheck -check-prefixes=CHECK,GREEDY -implicit-check-not=error %s
 ; RUN: not llc -mtriple=amdgcn-amd-amdhsa -stress-regalloc=1 -vgpr-regalloc=basic -filetype=null %s 2>&1 | FileCheck -implicit-check-not=error -check-prefixes=CHECK,BASIC %s
 ; RUN: not llc -mtriple=amdgcn-amd-amdhsa -stress-regalloc=1 -vgpr-regalloc=fast -filetype=null %s 2>&1 | FileCheck -implicit-check-not=error -check-prefixes=CHECK,FAST %s


        


More information about the llvm-commits mailing list