[llvm] [NVPTX] Generalize and extend upsizing when lowering 8/16-bit-element vector loads/stores (PR #119622)

[Artem Belevich via llvm-commits]

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@@ -3278,7 +3268,10 @@ NVPTXTargetLowering::LowerSTOREVector(SDValue Op, SelectionDAG &DAG) const {
   Ops.push_back(N->getOperand(0));
 
   // Then the split values
-  if (UpsizeElementTypes) {
+  if (ValVT.getVectorNumElements() > NumElts) {
+    // If the number of elements has changed, getVectorLoweringShape has upsized
+    // the element types
+    assert((Isv2x16VT(EltVT) || EltVT == MVT::v4i8) && "Unexpected upsized type.");
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Artem-B wrote:

I think what we really care about here is that EltVT is a vector, is 32 bits in size, and has no more than 4 elements. Checking for specific types does the job, but relies on the implementation detail and we have to change it every time we add another type.

https://github.com/llvm/llvm-project/pull/119622