[llvm] [NVPTX] Generalize and extend upsizing when lowering 8/16-bit-element vector loads/stores (PR #119622)

[Artem Belevich via llvm-commits]

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@@ -3278,7 +3268,10 @@ NVPTXTargetLowering::LowerSTOREVector(SDValue Op, SelectionDAG &DAG) const {
   Ops.push_back(N->getOperand(0));
 
   // Then the split values
-  if (UpsizeElementTypes) {
+  if (ValVT.getVectorNumElements() > NumElts) {
+    // If the number of elements has changed, getVectorLoweringShape has upsized
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Artem-B wrote:

We have potentially three outcomes:
* NumElts didn't change. That's supposed to be handled by the `else` clause.
* NumElts decreased. We've upsized vector elements to 32 bits. This is what the true bllock does now.
* NumElts increased. That's an error, and it will currently result in us executing the `else` block, which would be a wrong thing to do.

I think we need an assert before the `if` that we do not expect NumElts to ever increase, or change `else` into a strict equality check and add `else llvm_unreachable()`;

https://github.com/llvm/llvm-project/pull/119622