[llvm] [X86][Codegen] Shuffle certain shifts on i8 vectors to create opportunity for vectorized shift instructions (PR #117980)

William Huang via llvm-commits llvm-commits at lists.llvm.org
Mon Dec 16 15:00:01 PST 2024


huangjd wrote:

> > > Depending on your target CPU I did start work on generic vXi8 shift lowering using GFNI instructions: #89644 which I haven't had time to go back to, have you looked at anything similar?
> > 
> > 
> > Won't affect GFNI, as my patch does not apply on AVX512, and all GFNI CPU has AVX512
> 
> GFNI isn't AVX512 only - everything since Alderlake (P + E cores) has it, as well a some recent Atom cores (Tremont onwards).

As for now I make my patch mutually exclusive to GFNI (so if GFNI exists on the target CPU, it will be applied while my transformation will not). 

https://github.com/llvm/llvm-project/pull/117980


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