[llvm] [Xtensa] Implement Code Density Option. (PR #119639)
Andrei Safronov via llvm-commits
llvm-commits at lists.llvm.org
Mon Dec 16 11:35:05 PST 2024
================
@@ -243,9 +263,37 @@ static DecodeStatus decodeMem32Operand(MCInst &Inst, uint64_t Imm,
return MCDisassembler::Success;
}
+static DecodeStatus decodeMem32nOperand(MCInst &Inst, uint64_t Imm,
+ int64_t Address, const void *Decoder) {
+ assert(isUInt<8>(Imm) && "Invalid immediate");
+ DecodeARRegisterClass(Inst, Imm & 0xf, Address, Decoder);
+ Inst.addOperand(MCOperand::createImm((Imm >> 2) & 0x3c));
+ return MCDisassembler::Success;
+}
+
+/// Read two bytes from the ArrayRef and return 16 bit data sorted
+/// according to the given endianness.
+static DecodeStatus readInstruction16(ArrayRef<uint8_t> Bytes, uint64_t Address,
+ uint64_t &Size, uint64_t &Insn,
+ bool IsLittleEndian) {
+ // We want to read exactly 2 Bytes of data.
+ if (Bytes.size() < 2) {
+ Size = 0;
+ return MCDisassembler::Fail;
+ }
+
+ if (!IsLittleEndian) {
+ llvm_unreachable("Big-endian mode currently is not supported!");
----------------
andreisfr wrote:
I changed "llvm_unreachable" in readInstruction16 to "report_fatal_error", like it is done in readInstruction24.
Hypothetically, the Xtensa architecture could have a big endian implementation, but in practice it is hard to find such hardware (at least I don't see such an example). So we don't expect such a triple variant at this time.
https://github.com/llvm/llvm-project/pull/119639
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