[llvm] c539014 - [SLP][NFC]Add a test with incorrect bitwidth for the node, previously identified as non-shrinkable

[Alexey Bataev via llvm-commits]

Author: Alexey Bataev
Date: 2024-12-16T07:50:49-08:00
New Revision: c53901405a309a414cb731c4b22f32eafccbbd2a

URL: https://github.com/llvm/llvm-project/commit/c53901405a309a414cb731c4b22f32eafccbbd2a
DIFF: https://github.com/llvm/llvm-project/commit/c53901405a309a414cb731c4b22f32eafccbbd2a.diff

LOG: [SLP][NFC]Add a test with incorrect bitwidth for the node, previously identified as non-shrinkable

Added: 
    llvm/test/Transforms/SLPVectorizer/X86/minbw-node-used-twice.ll

Modified: 
    

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/SLPVectorizer/X86/minbw-node-used-twice.ll b/llvm/test/Transforms/SLPVectorizer/X86/minbw-node-used-twice.ll
new file mode 100644
index 00000000000000..afc38bdf00c432
--- /dev/null
+++ b/llvm/test/Transforms/SLPVectorizer/X86/minbw-node-used-twice.ll
@@ -0,0 +1,33 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
+; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-unknown-linux < %s | FileCheck %s
+
+define i8 @test() {
+; CHECK-LABEL: define i8 @test() {
+; CHECK-NEXT:  [[ENTRY:.*:]]
+; CHECK-NEXT:    [[SUB_I_I79_PEEL_I:%.*]] = sub i16 0, 1
+; CHECK-NEXT:    [[TMP0:%.*]] = insertelement <2 x i16> <i16 poison, i16 0>, i16 [[SUB_I_I79_PEEL_I]], i32 0
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp slt <2 x i16> zeroinitializer, [[TMP0]]
+; CHECK-NEXT:    [[TMP2:%.*]] = zext <2 x i1> [[TMP1]] to <2 x i16>
+; CHECK-NEXT:    [[TMP3:%.*]] = or <2 x i16> [[TMP2]], [[TMP0]]
+; CHECK-NEXT:    [[TMP4:%.*]] = icmp eq <2 x i16> [[TMP3]], [[TMP0]]
+; CHECK-NEXT:    [[TMP5:%.*]] = extractelement <2 x i1> [[TMP1]], i32 0
+; CHECK-NEXT:    [[CONV13_I89_PEEL_I:%.*]] = zext i1 [[TMP5]] to i8
+; CHECK-NEXT:    ret i8 [[CONV13_I89_PEEL_I]]
+;
+entry:
+  %conv4.i.i = zext i16 0 to i32
+  %conv7.i.i = sext i16 0 to i32
+  %cmp8.i.i = icmp slt i32 %conv7.i.i, %conv4.i.i
+  %conv9.i.i = zext i1 %cmp8.i.i to i32
+  %or10.i.i = or i32 %conv9.i.i, %conv4.i.i
+  %cmp11.i.i = icmp eq i32 %or10.i.i, %conv4.i.i
+  %sub.i.i79.peel.i = sub i16 0, 1
+  %xor5.i81.peel.i = zext i16 %sub.i.i79.peel.i to i32
+  %conv7.i84.peel.i = sext i16 0 to i32
+  %cmp8.i85.peel.i = icmp slt i32 %conv7.i84.peel.i, %xor5.i81.peel.i
+  %conv9.i86.peel.i = zext i1 %cmp8.i85.peel.i to i32
+  %or10.i87.peel.i = or i32 %conv9.i86.peel.i, %xor5.i81.peel.i
+  %cmp11.i88.peel.i = icmp eq i32 %or10.i87.peel.i, %xor5.i81.peel.i
+  %conv13.i89.peel.i = zext i1 %cmp8.i85.peel.i to i8
+  ret i8 %conv13.i89.peel.i
+}