[llvm] 24238aa - [gn build] Port 03847f19f2e4

[LLVM GN Syncbot via llvm-commits]

Author: LLVM GN Syncbot
Date: 2024-12-16T12:43:55Z
New Revision: 24238aacd9e67072f2bd7bebe4c41b52c7881e65

URL: https://github.com/llvm/llvm-project/commit/24238aacd9e67072f2bd7bebe4c41b52c7881e65
DIFF: https://github.com/llvm/llvm-project/commit/24238aacd9e67072f2bd7bebe4c41b52c7881e65.diff

LOG: [gn build] Port 03847f19f2e4

Added: 
    

Modified: 
    llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
    llvm/utils/gn/secondary/llvm/lib/Target/Mips/BUILD.gn
    llvm/utils/gn/secondary/llvm/lib/Target/NVPTX/BUILD.gn
    llvm/utils/gn/secondary/llvm/lib/Target/PowerPC/BUILD.gn
    llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn

Removed: 
    


################################################################################
diff  --git a/llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
index 745179213ae32d..aaf2a869bf5d28 100644
--- a/llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
@@ -187,6 +187,7 @@ static_library("LLVMAMDGPUCodeGen") {
     "AMDGPUResourceUsageAnalysis.cpp",
     "AMDGPURewriteOutArguments.cpp",
     "AMDGPURewriteUndefForPHI.cpp",
+    "AMDGPUSelectionDAGInfo.cpp",
     "AMDGPUSetWavePriority.cpp",
     "AMDGPUSplitModule.cpp",
     "AMDGPUSubtarget.cpp",

diff  --git a/llvm/utils/gn/secondary/llvm/lib/Target/Mips/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/Mips/BUILD.gn
index 8174d31a99d50c..9ea8bb44cf8628 100644
--- a/llvm/utils/gn/secondary/llvm/lib/Target/Mips/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/lib/Target/Mips/BUILD.gn
@@ -108,6 +108,7 @@ static_library("LLVMMipsCodeGen") {
     "MipsSEISelLowering.cpp",
     "MipsSEInstrInfo.cpp",
     "MipsSERegisterInfo.cpp",
+    "MipsSelectionDAGInfo.cpp",
     "MipsSubtarget.cpp",
     "MipsTargetMachine.cpp",
     "MipsTargetObjectFile.cpp",

diff  --git a/llvm/utils/gn/secondary/llvm/lib/Target/NVPTX/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/NVPTX/BUILD.gn
index 47c69d09d48d98..fb2ec0017c42aa 100644
--- a/llvm/utils/gn/secondary/llvm/lib/Target/NVPTX/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/lib/Target/NVPTX/BUILD.gn
@@ -50,6 +50,7 @@ static_library("LLVMNVPTXCodeGen") {
     "NVPTXProxyRegErasure.cpp",
     "NVPTXRegisterInfo.cpp",
     "NVPTXReplaceImageHandles.cpp",
+    "NVPTXSelectionDAGInfo.cpp",
     "NVPTXSubtarget.cpp",
     "NVPTXTargetMachine.cpp",
     "NVPTXTargetTransformInfo.cpp",

diff  --git a/llvm/utils/gn/secondary/llvm/lib/Target/PowerPC/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/PowerPC/BUILD.gn
index 1ae976da2bed6a..ea3615cee392a1 100644
--- a/llvm/utils/gn/secondary/llvm/lib/Target/PowerPC/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/lib/Target/PowerPC/BUILD.gn
@@ -86,6 +86,7 @@ static_library("LLVMPowerPCCodeGen") {
     "PPCPreEmitPeephole.cpp",
     "PPCReduceCRLogicals.cpp",
     "PPCRegisterInfo.cpp",
+    "PPCSelectionDAGInfo.cpp",
     "PPCSubtarget.cpp",
     "PPCTLSDynamicCall.cpp",
     "PPCTOCRegDeps.cpp",

diff  --git a/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
index 505bb6ddfffcf0..177ae3c3a7b29f 100644
--- a/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
@@ -137,6 +137,7 @@ static_library("LLVMRISCVCodeGen") {
     "RISCVPushPopOptimizer.cpp",
     "RISCVRedundantCopyElimination.cpp",
     "RISCVRegisterInfo.cpp",
+    "RISCVSelectionDAGInfo.cpp",
     "RISCVSubtarget.cpp",
     "RISCVTargetMachine.cpp",
     "RISCVTargetObjectFile.cpp",